kernel.git/arch/microblaze/pci, branch linux-4.12.y

PCI: Add BAR index argument to pci_mmap_page_range()

2017-04-20T13:47:47Z

In all cases we know which BAR it is. Passing it in means that arch code (or generic code; watch this space) won't have to go looking for it again. Signed-off-by: David Woodhouse Signed-off-by: Bjorn Helgaas

mm: remove shmem_mapping() shmem_zero_setup() duplicates

2017-02-25T01:46:56Z

Remove the prototypes for shmem_mapping() and shmem_zero_setup() from linux/mm.h, since they are already provided in linux/shmem_fs.h. But shmem_fs.h must then provide the inline stub for shmem_mapping() when CONFIG_SHMEM is not set, and a few more cfiles now need to #include it. Link: http://lkml.kernel.org/r/alpine.LSU.2.11.1702081658250.1549@eggly.anvils Signed-off-by: Hugh Dickins Cc: Johannes Weiner Cc: Michal Simek Cc: Michael Ellerman Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

microblaze/PCI: Add multidomain support for procfs

2016-09-13T15:41:48Z

We create a procfs directory for every PCI bus. Previously, the directory name was just the bus number, so using the same bus number in different domains caused a kernel crash when we tried to create a duplicate directory. Make pci_proc_domain() return the domain number, so procfs directories for buses in domain 0 are named with just the bus number, and directories for buses in other domains include both the domain number and the bus number. [bhelgaas: changelog] Signed-off-by: Bharat Kumar Gogada Signed-off-by: Bjorn Helgaas Acked-by: Michal Simek

microblaze/PCI: Implement pci_resource_to_user() with pcibios_resource_to_bus()

2016-06-17T19:43:34Z

"User" addresses are shown in /sys/devices/pci.../.../resource and /proc/bus/pci/devices and used as mmap offsets for /proc/bus/pci/BB/DD.F files. For I/O port resources on microblaze, these are PCI bus addresses, i.e., raw BAR values. Previously pci_resource_to_user() computed the user address by subtracting "hose->io_base_virt - _IO_BASE" from the resource start: pci_resource_to_user() if (IO) offset = (unsigned long)hose->io_base_virt - _IO_BASE; *start = rsrc->start - offset; We've already told the PCI core about that "hose->io_base_virt - _IO_BASE" offset: pcibios_setup_phb_resources() res = &hose->io_resource; pci_add_resource_offset(resources, res, hose->io_base_virt - _IO_BASE); so pcibios_resource_to_bus() knows how to do that translation. No functional change intended. Signed-off-by: Bjorn Helgaas Acked-by: Yinghai Lu

microblaze/PCI: Remove useless __pci_mmap_set_pgprot()

2016-06-17T19:43:33Z

The microblaze __pci_mmap_set_pgprot() was apparently copied from powerpc, where it computes either an uncacheable pgprot_t or a write-combining one. But on microblaze, we always use the regular uncacheable pgprot_t. Remove the useless code in __pci_mmap_set_pgprot() and inline it at the only call site. Signed-off-by: Bjorn Helgaas Acked-by: Yinghai Lu

microblaze: pci: export isa_io_base to fix link errors

2016-05-16T07:18:10Z

ERROR: "isa_io_base" [sound/pci/vx222/snd-vx222.ko] undefined! ERROR: "isa_io_base" [sound/pci/trident/snd-trident.ko] undefined! ERROR: "isa_io_base" [sound/pci/snd-via82xx.ko] undefined! ... ERROR: "isa_io_base" [drivers/watchdog/wdt_pci.ko] undefined! ERROR: "isa_io_base" [drivers/watchdog/pcwd_pci.ko] undefined! ERROR: "isa_io_base" [drivers/video/vgastate.ko] undefined! ... ERROR: "isa_io_base" [drivers/video/fbdev/cirrusfb.ko] undefined! ERROR: "isa_io_base" [drivers/video/fbdev/arkfb.ko] undefined! ERROR: "isa_io_base" [drivers/usb/host/uhci-hcd.ko] undefined! ERROR: "isa_io_base" [drivers/usb/host/isp1362-hcd.ko] undefined! ERROR: "isa_io_base" [drivers/tty/serial/jsm/jsm.ko] undefined! ERROR: "isa_io_base" [drivers/tty/serial/8250/8250_pci.ko] undefined! ... ERROR: "isa_io_base" [drivers/scsi/qla2xxx/qla2xxx.ko] undefined! ERROR: "isa_io_base" [drivers/scsi/ppa.ko] undefined! Signed-off-by: Fengguang Wu Signed-off-by: Michal Simek

microblaze/PCI: Support generic Xilinx AXI PCIe Host Bridge IP driver

2016-03-08T20:25:57Z

Modify the Microblaze PCI subsystem to work with the generic drivers/pci/host/pcie-xilinx.c driver on Microblaze and Zynq. [bhelgaas: changelog] Signed-off-by: Bharat Kumar Gogada Signed-off-by: Ravi Kiran Gummaluri Signed-off-by: Bjorn Helgaas Acked-by: Michal Simek

PCI: Revert "PCI: Call pci_read_bridge_bases() from core instead of arch code"

2015-09-15T18:18:04Z

Revert dff22d2054b5 ("PCI: Call pci_read_bridge_bases() from core instead of arch code"). Reading PCI bridge windows is not arch-specific in itself, but there is PCI core code that doesn't work correctly if we read them too early. For example, Hannes found this case on an ARM Freescale i.mx6 board: pci_bus 0000:00: root bus resource [mem 0x01000000-0x01efffff] pci 0000:00:00.0: PCI bridge to [bus 01-ff] pci 0000:00:00.0: BAR 8: no space for [mem size 0x01000000] (mem window) pci 0000:01:00.0: BAR 2: failed to assign [mem size 0x00200000] pci 0000:01:00.0: BAR 1: failed to assign [mem size 0x00004000] pci 0000:01:00.0: BAR 0: failed to assign [mem size 0x00000100] The 00:00.0 mem window needs to be at least 3MB: the 01:00.0 device needs 0x204100 of space, and mem windows are megabyte-aligned. Bus sizing can increase a bridge window size, but never *decrease* it (see d65245c3297a ("PCI: don't shrink bridge resources")). Prior to dff22d2054b5, ARM didn't read bridge windows at all, so the "original size" was zero, and we assigned a 3MB window. After dff22d2054b5, we read the bridge windows before sizing the bus. The firmware programmed a 16MB window (size 0x01000000) in 00:00.0, and since we never decrease the size, we kept 16MB even though we only needed 3MB. But 16MB doesn't fit in the host bridge aperture, so we failed to assign space for the window and the downstream devices. I think this is a defect in the PCI core: we shouldn't rely on the firmware to assign sensible windows. Ray reported a similar problem, also on ARM, with Broadcom iProc. Issues like this are too hard to fix right now, so revert dff22d2054b5. Reported-by: Hannes Reported-by: Ray Jui Link: http://lkml.kernel.org/r/CAAa04yFQEUJm7Jj1qMT57-LG7ZGtnhNDBe=PpSRa70Mj+XhW-A@mail.gmail.com Link: http://lkml.kernel.org/r/55F75BB8.4070405@broadcom.com Signed-off-by: Bjorn Helgaas Acked-by: Yinghai Lu Acked-by: Lorenzo Pieralisi

PCI: Call pci_read_bridge_bases() from core instead of arch code

2015-07-23T15:13:29Z

When we scan a PCI bus, we read PCI-PCI bridge window registers with pci_read_bridge_bases() so we can validate the resource hierarchy. Most architectures call pci_read_bridge_bases() from pcibios_fixup_bus(), but PCI-PCI bridges are not arch-specific, so this doesn't need to be in arch-specific code. Call pci_read_bridge_bases() directly from the PCI core instead of from arch code. For alpha and mips, we now call pci_read_bridge_bases() always; previously we only called it if PCI_PROBE_ONLY was set. [bhelgaas: changelog] Signed-off-by: Lorenzo Pieralisi Signed-off-by: Bjorn Helgaas CC: Ralf Baechle CC: James E.J. Bottomley CC: Michael Ellerman CC: Bjorn Helgaas CC: Richard Henderson CC: Benjamin Herrenschmidt CC: David Howells CC: Russell King CC: Tony Luck CC: David S. Miller CC: Ingo Molnar CC: Guenter Roeck CC: Michal Simek CC: Chris Zankel

PCI: Assign resources before drivers claim devices (pci_scan_root_bus())

2015-03-19T15:17:13Z

Previously, pci_scan_root_bus() created a root PCI bus, enumerated the devices on it, and called pci_bus_add_devices(), which made the devices available for drivers to claim them. Most callers assigned resources to devices after pci_scan_root_bus() returns, which may be after drivers have claimed the devices. This is incorrect; the PCI core should not change device resources while a driver is managing the device. Remove pci_bus_add_devices() from pci_scan_root_bus() and do it after any resource assignment in the callers. Note that ARM's pci_common_init_dev() already called pci_bus_add_devices() after pci_scan_root_bus(), so we only need to remove the first call: pci_common_init_dev pcibios_init_hw pci_scan_root_bus pci_bus_add_devices # first call pci_bus_assign_resources pci_bus_add_devices # second call [bhelgaas: changelog, drop "root_bus" var in alpha common_init_pci(), return failure earlier in mn10300, add "return" in x86 pcibios_scan_root(), return early if xtensa platform_pcibios_fixup() fails] Signed-off-by: Yijing Wang Signed-off-by: Bjorn Helgaas CC: Richard Henderson CC: Ivan Kokshaysky CC: Matt Turner CC: David Howells CC: Tony Luck CC: Michal Simek CC: Ralf Baechle CC: Koichi Yasutake CC: Sebastian Ott CC: "David S. Miller" CC: Chris Metcalf CC: Chris Zankel CC: Max Filippov CC: Thomas Gleixner