<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/m68k/platform, branch linux-3.7.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.7.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.7.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2012-09-27T13:34:03Z</updated>
<entry>
<title>m68knommu: clean up ColdFire 54xx General Timer definitions</title>
<updated>2012-09-27T13:34:03Z</updated>
<author>
<name>Greg Ungerer</name>
</author>
<published>2012-09-18T04:51:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=944c3d81dbead14725e7d12675c37a2027760608'/>
<id>urn:sha1:944c3d81dbead14725e7d12675c37a2027760608</id>
<content type='text'>
Convert the ColdFire 54xx CPU General Timer register address definitions to
include the MCF_MBAR peripheral region offset. This makes them consistent
with all other 54xx address register definitions (in m54xxsim.h).

The goal is to reduce different definitions used (some including offsets and
others not) causing bugs when used incorrectly.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: clean up Pin Assignment definitions for the 54xx ColdFire CPU</title>
<updated>2012-09-27T13:34:02Z</updated>
<author>
<name>Greg Ungerer</name>
</author>
<published>2012-09-18T04:34:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=632306f2454bf46c71d4fb7a499916d942b22a32'/>
<id>urn:sha1:632306f2454bf46c71d4fb7a499916d942b22a32</id>
<content type='text'>
The Pin Assignment register definitions for the ColdFire 54xx CPU family are
inconsistently named and defined compared to the other ColdFire part
definitions. Rename them with the same prefix as used on other parts,
MCFGPIO_PAR_, and make their definitions include the MCF_MBAR periphperal
region offset.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: fix multi-function pin setup for FEC module on ColdFire 523x</title>
<updated>2012-09-27T13:34:01Z</updated>
<author>
<name>Greg Ungerer</name>
</author>
<published>2012-09-18T02:14:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=98d9696b38df7d477be34fccd4abb2aae02987c8'/>
<id>urn:sha1:98d9696b38df7d477be34fccd4abb2aae02987c8</id>
<content type='text'>
The multi-function pin setup code for the FEC ethernet module is using just
plain wrong. Looks like it was cut-and-pasted from other init code. It has
hard coded register addresses that are incorrect for the 523x, and it is
manipulating bits that don't make sense.

Add proper register definitions for the Pin Assignment registers of the 532x,
and then use them to fix the setup code for the FEC hardware module.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: move ColdFire slice timer address defiens to 54xx header</title>
<updated>2012-09-27T13:34:01Z</updated>
<author>
<name>Greg Ungerer</name>
</author>
<published>2012-09-17T06:51:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f2f41c68eabfb32574f9088135480618206dd432'/>
<id>urn:sha1:f2f41c68eabfb32574f9088135480618206dd432</id>
<content type='text'>
Move the base address defines of the ColdFire 54xx CPU slice timers into the
54xx specific header (m54xxsim.h). They are CPU specific, and belong with the
CPU specific defines. Also make them relative to the MBAR peripheral region,
making the define the absolute address.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: use read/write IO access functions in ColdFire m532x setup code</title>
<updated>2012-09-27T13:34:00Z</updated>
<author>
<name>Greg Ungerer</name>
</author>
<published>2012-09-17T06:16:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6d8a1393ec700d8621858dd0f3bee2b7e821e9fc'/>
<id>urn:sha1:6d8a1393ec700d8621858dd0f3bee2b7e821e9fc</id>
<content type='text'>
Get rid of the use of local IO access macros and switch to using the standard
read*/write* family of access functions for the ColdFire m532x setup code.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: modify ColdFire 532x GPIO register definitions to be consistent</title>
<updated>2012-09-27T13:33:59Z</updated>
<author>
<name>Greg Ungerer</name>
</author>
<published>2012-09-17T05:26:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e4c2b9befe91a0e9bdbbdaf9faf4b093b35c9044'/>
<id>urn:sha1:e4c2b9befe91a0e9bdbbdaf9faf4b093b35c9044</id>
<content type='text'>
The ColdFire 532x CPU register definitions for the multi-function setup
pins are inconsistently defined compared with other ColdFire parts. Modify
the register defintions to be just the addresses, not pointers. This also
fixes the erroneous use in one case of using these values in the UART setup
code for the 532x.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: use definitions for the ColdFire 528x FEC multi-function pins</title>
<updated>2012-09-27T13:33:57Z</updated>
<author>
<name>Greg Ungerer</name>
</author>
<published>2012-09-17T02:20:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a91f741589f010e1dfa6ec6fe7afbad0ef47d937'/>
<id>urn:sha1:a91f741589f010e1dfa6ec6fe7afbad0ef47d937</id>
<content type='text'>
Currently the setup code for the FEC multi-function pins on the ColdFire 528x
has the addresses hard coded in the code. Use the register defines that
already exist for this.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: remove address offsets relative to IPSBAR for ColdFire 527x</title>
<updated>2012-09-27T13:33:56Z</updated>
<author>
<name>Greg Ungerer</name>
</author>
<published>2012-09-17T02:07:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f821e349cf2539bc7752652ef7b60030c1fc49fb'/>
<id>urn:sha1:f821e349cf2539bc7752652ef7b60030c1fc49fb</id>
<content type='text'>
Remove the last address definitions relative to the IPSBAR peripheral region
for the ColdFire 527x family. This involved cleaning up some magic numbers
used in the code part, and making them proper register definitions in the 527x
specific header.

This is part of the process of cleaning up the ColdFire register definitions
to make them consistently use absolute addresses for the primary registers.
This will reduce the occasional bugs caused by inconsistent definition of
the register addresses.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: fix wrong register offsets used for ColdFire 5272 multi-function pins</title>
<updated>2012-09-27T13:33:54Z</updated>
<author>
<name>Greg Ungerer</name>
</author>
<published>2012-09-14T06:36:08Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4fb62ededfc5021e7fa25cbc20f92003e148af27'/>
<id>urn:sha1:4fb62ededfc5021e7fa25cbc20f92003e148af27</id>
<content type='text'>
The registers used to configure and set the multifunction pins on the 5272
ColdFire are defined as absolute addresses. So the use of them does not need
to be offset relative to the peripheral region address.

Fix two cases of incorrect usage of these addresses. Both affect UART
initialization, one in the common UART pin setup code, the other in the
NETtel board specific UART signal handling.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
<entry>
<title>m68knommu: make ColdFire 5249 MBAR2 register definitions absolute addresses</title>
<updated>2012-09-27T13:33:53Z</updated>
<author>
<name>Greg Ungerer</name>
</author>
<published>2012-09-14T13:57:39Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=041a89a41993e6023f110bf0cbbda847173e795c'/>
<id>urn:sha1:041a89a41993e6023f110bf0cbbda847173e795c</id>
<content type='text'>
Make the ColdFire 5249 MBAR peripheral register definitions absolute
addresses, instead of offsets into the region.

The various ColdFire parts use different methods to address the internal
registers, some are absolute, some are relative to peripheral regions
which can be mapped at different address ranges (such as the MBAR and IPSBAR
registers). We don't want to deal with this in the code when we are
accessing these registers, so make all register definitions the absolute
address - factoring out whether it is an offset into a peripheral region.

This makes them all consistently defined, and reduces the occasional bugs
caused by inconsistent definition of the register addresses.

Signed-off-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
</content>
</entry>
</feed>
