Hosts the 0x221E linux distro kernel. https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.10.y 2024-06-03T07:45:53Z 2024-06-03T07:45:53Z Huacai Chen 2024-06-03T07:45:53Z urn:sha1:eb36e520f4f1b690fd776f15cbac452f82ff7bfa The GMAC of Loongson chips cannot insert the correct 1.5-2ns delay. So we need the PHY to insert internal delays for both transmit and receive data lines from/to the PHY device. Fix this by changing the "phy-mode" from "rgmii" to "rgmii-id" in dts. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2024-05-14T04:24:24Z Binbin Zhou 2024-05-14T04:24:24Z urn:sha1:7c33c9111c8b5fecf4c7a40e31f69125c1b5a1b6 By now, more Loongson-2K2000 related drivers are supported, such as clock controller and thermal controller. So we add these device nodes to the Loongson-2K2000 dts file. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2024-05-14T04:24:18Z Binbin Zhou 2024-05-14T04:24:18Z urn:sha1:bd7bc02b0cfe141c077187244ddd2022102618fe By now, more Loongson-2K0500 related drivers are supported, such as clock controller, thermal controller, and dma controller. So we add these device nodes to the Loongson-2K0500 dts file. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2024-05-14T04:24:18Z Binbin Zhou 2024-05-14T04:24:18Z urn:sha1:3e4d599c1c26afcda5b7be7fa2c04946eb166d4a Things like clock controllers or architectural interrupt controllers, no one would disable them because otherwise they would have no usable system. So we just "enabled" them by default. Suggested-by: Conor Dooley <conor.dooley@microchip.com> Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2024-04-10T13:08:51Z Huacai Chen 2024-04-10T13:08:51Z urn:sha1:3744e0ee80251149135aac59870147e9ed6faae7 Current dts file for Loongson-2K2000's GMAC/GNET is incomplete, both irq and phy descriptions are missing. Add them to make GMAC/GNET work. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2024-04-10T13:08:51Z Huacai Chen 2024-04-10T13:08:51Z urn:sha1:84892cebdc7fd5d6d70ba5b667a7440dfed2d032 Current dts file for Loongson-2K2000 misses the interrupt-controller & interrupt-cells descriptions in the msi-controller node, and misses the msi-parent link in the pci root node. Add them to support PCI-MSI. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2024-04-10T13:08:51Z Huacai Chen 2024-04-10T13:08:51Z urn:sha1:b07b9f353d750ae503fc9fcbdc5f29dc38553605 Some Loongson-2K2000 platforms have ISA/LPC devices such as Super-IO, define an ISA node in the dts file to avoid access error. Also adjust the PCI io resource range to avoid confliction. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2024-04-10T13:08:51Z Huacai Chen 2024-04-10T13:08:51Z urn:sha1:ec2bbc575e44909fd333328537519145852927a6 Some Loongson-2K1000 platforms have ISA/LPC devices such as Super-IO, define an ISA node in the dts file to avoid access error. Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2024-02-23T06:36:31Z Krzysztof Kozlowski 2024-02-23T06:36:31Z urn:sha1:f661ca40787396a3b7f324ae2a215bd67cc92955 The DTS code coding style expects exactly one space before '{' character. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn> 2024-01-17T04:43:08Z Binbin Zhou 2024-01-17T04:43:08Z urn:sha1:2905844f682808275ea5daf6f5b668fbfe547363 Add DeviceTree file for Loongson-2K2000 processor, which integrates two 64-bit 3-issue superscalar LA364 processor cores. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>