<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/ia64/kernel/head.S, branch linux-2.6.28.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.28.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2008-11-20T21:27:12Z</updated>
<entry>
<title>[IA64] Rationalize kernel mode alignment checking</title>
<updated>2008-11-20T21:27:12Z</updated>
<author>
<name>Tony Luck</name>
</author>
<published>2008-11-20T21:27:12Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b704882e70d87d7f56db5ff17e2253f3fa90e4f3'/>
<id>urn:sha1:b704882e70d87d7f56db5ff17e2253f3fa90e4f3</id>
<content type='text'>
Itanium processors can handle some misaligned data accesses. They
also provide a mode where all such accesses are forced to trap. The
kernel was schizophrenic about use of this mode:

* Base kernel code ran in permissive mode where the only traps
  generated were from those cases that the h/w could not handle.
* Interrupt, syscall and trap code ran in strict mode where all
  unaligned accesses caused traps to the 0x5a00 unaligned reference
  vector.

Use strict alignment checking throughout the kernel, but make
sure that we continue to let user mode use more relaxed mode
as the default.

Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
<entry>
<title>[IA64] Put the space for cpu0 per-cpu area into .data section</title>
<updated>2008-09-29T23:39:19Z</updated>
<author>
<name>Tony Luck</name>
</author>
<published>2008-09-29T23:39:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c459ce8b5a7d933a3bcf6915ab17ac1e036e2ac4'/>
<id>urn:sha1:c459ce8b5a7d933a3bcf6915ab17ac1e036e2ac4</id>
<content type='text'>
Initial fix for making sure that we can access percpu variables
in all C code (commit: 10617bbe84628eb18ab5f723d3ba35005adde143)
inadvertantly allocated the memory in the "percpu" section of
the vmlinux ELF executable.  This confused kexec/dump.

Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
<entry>
<title>[IA64] Ensure cpu0 can access per-cpu variables in early boot code</title>
<updated>2008-08-12T17:34:20Z</updated>
<author>
<name>Tony Luck</name>
</author>
<published>2008-08-12T17:34:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=10617bbe84628eb18ab5f723d3ba35005adde143'/>
<id>urn:sha1:10617bbe84628eb18ab5f723d3ba35005adde143</id>
<content type='text'>
ia64 handles per-cpu variables a litle differently from other architectures
in that it maps the physical memory allocated for each cpu at a constant
virtual address (0xffffffffffff0000). This mapping is not enabled until
the architecture specific cpu_init() function is run, which causes problems
since some generic code is run before this point. In particular when
CONFIG_PRINTK_TIME is enabled, the boot cpu will trap on the access to
per-cpu memory at the first printk() call so the boot will fail without
the kernel printing anything to the console.

Fix this by allocating percpu memory for cpu0 in the kernel data section
and doing all initialization to enable percpu access in head.S before
calling any generic code.

Other cpus must take care not to access per-cpu variables too early, but
their code path from start_secondary() to cpu_init() is all in arch/ia64

Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
<entry>
<title>[IA64] Move include/asm-ia64 to arch/ia64/include/asm</title>
<updated>2008-08-01T17:21:21Z</updated>
<author>
<name>Tony Luck</name>
</author>
<published>2008-08-01T17:13:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7f30491ccd28627742e37899453ae20e3da8e18f'/>
<id>urn:sha1:7f30491ccd28627742e37899453ae20e3da8e18f</id>
<content type='text'>
After moving the the include files there were a few clean-ups:

1) Some files used #include &lt;asm-ia64/xyz.h&gt;, changed to &lt;asm/xyz.h&gt;

2) Some comments alerted maintainers to look at various header files to
make matching updates if certain code were to be changed. Updated these
comments to use the new include paths.

3) Some header files mentioned their own names in initial comments. Just
deleted these self references.

Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
<entry>
<title>[IA64] pvops: add an early setup hook for pv_ops.</title>
<updated>2008-05-27T21:39:54Z</updated>
<author>
<name>Isaku Yamahata</name>
</author>
<published>2008-05-19T13:13:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3e0879deb700f322f6c81ab34f056fc72d15ec02'/>
<id>urn:sha1:3e0879deb700f322f6c81ab34f056fc72d15ec02</id>
<content type='text'>
This patch adds a setup hook in the very early boot sequence
before start_kernel() to initialize paravirtualization stuff.
The hook will be set by each pv loader code or by using multi entry point.

Signed-off-by: Qing He &lt;qing.he@intel.com&gt;
Signed-off-by: Isaku Yamahata &lt;yamahata@valinux.co.jp&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
<entry>
<title>[IA64] VIRT_CPU_ACCOUNTING (accurate cpu time accounting)</title>
<updated>2008-02-20T20:55:37Z</updated>
<author>
<name>Hidetoshi Seto</name>
</author>
<published>2008-01-29T05:27:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b64f34cdfe5bef9dfed1304c513220b0f2862eca'/>
<id>urn:sha1:b64f34cdfe5bef9dfed1304c513220b0f2862eca</id>
<content type='text'>
This patch implements VIRT_CPU_ACCOUNTING for ia64,
which enable us to use more accurate cpu time accounting.

The VIRT_CPU_ACCOUNTING is an item of kernel config, which s390
and powerpc arch have.  By turning this config on, these archs
change the mechanism of cpu time accounting from tick-sampling
based one to state-transition based one.

The state-transition based accounting is done by checking time
(cycle counter in processor) at every state-transition point,
such as entrance/exit of kernel, interrupt, softirq etc.
The difference between point to point is the actual time consumed
during in the state. There is no doubt about that this value is
more accurate than that of tick-sampling based accounting.

Signed-off-by: Hidetoshi Seto &lt;seto.hidetoshi@jp.fujitsu.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
<entry>
<title>[IA64] Remove assembler warnings on head.S</title>
<updated>2007-12-19T19:15:12Z</updated>
<author>
<name>Hidetoshi Seto</name>
</author>
<published>2007-12-12T07:28:52Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=091062284c05d13b3393f4fcfcedc0f52cb948b4'/>
<id>urn:sha1:091062284c05d13b3393f4fcfcedc0f52cb948b4</id>
<content type='text'>
This patch removes the following assembler warning messages.

  AS      arch/ia64/kernel/head.o
arch/ia64/kernel/head.S: Assembler messages:
arch/ia64/kernel/head.S:1179: Warning: Use of 'ld8' violates RAW dependency 'CR[PTA]' (data)
arch/ia64/kernel/head.S:1179: Warning: Only the first path encountering the conflict is reported
arch/ia64/kernel/head.S:1178: Warning: This is the location of the conflicting usage
arch/ia64/kernel/head.S:1180: Warning: Use of 'ld8' violates RAW dependency 'CR[PTA]' (data)
arch/ia64/kernel/head.S:1180: Warning: Only the first path encountering the conflict is reported
arch/ia64/kernel/head.S:1178: Warning: This is the location of the conflicting usage
 :
arch/ia64/kernel/head.S:1213: Warning: Use of 'ldf.fill.nta' violates RAW dependency 'CR[PTA]' (data)
arch/ia64/kernel/head.S:1213: Warning: Only the first path encountering the conflict is reported
arch/ia64/kernel/head.S:1178: Warning: This is the location of the conflicting usage

Signed-off-by: Hidetoshi Seto &lt;seto.hidetoshi@jp.fujitsu.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
<entry>
<title>[IA64] fix section mismatch warnings</title>
<updated>2007-07-25T20:08:26Z</updated>
<author>
<name>Tony Luck</name>
</author>
<published>2007-07-20T21:39:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9d6f40b86b47928ffde8a41cb2ef332da34b3de2'/>
<id>urn:sha1:9d6f40b86b47928ffde8a41cb2ef332da34b3de2</id>
<content type='text'>
In 741f98fe298a73c9d47ed53703c1279a29718581 Sam added full
checking across the entire vmlinux image.  This flushed out
a dozen new section mismatch warnings.  Start the whack-a-mole
game again to stomp them out.

Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
<entry>
<title>[IA64] Save register stack contents on cpu start</title>
<updated>2006-09-08T18:05:13Z</updated>
<author>
<name>Jack Steiner</name>
</author>
<published>2006-08-31T16:34:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1c7d67073e2d196597f541351bc9b109c8a93528'/>
<id>urn:sha1:1c7d67073e2d196597f541351bc9b109c8a93528</id>
<content type='text'>
The SN PROM uses the register stack in the slave loop. The contents
must be preserved for the OS to return to the slave loop via offlining
a cpu or for kexec. A 'flushrs" is needed to force the stack to be written
to memory prior to changing bspstore.

Signed-off-by: Jack Steiner &lt;steiner@sgi.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
<entry>
<title>[IA64] Don't alloc empty frame in ia64_switch_mode_phys</title>
<updated>2006-08-02T23:13:17Z</updated>
<author>
<name>Zou Nan hai</name>
</author>
<published>2006-07-25T23:36:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e55ce456155813ca34e105d0e05306edad05cf6e'/>
<id>urn:sha1:e55ce456155813ca34e105d0e05306edad05cf6e</id>
<content type='text'>
I think ia64_switch_mode_phys and ia64_switch_mode_virt
does not need to alloc an empty frame.
An empty frame is required by loadrs but flushrs
does not need that.

Signed-off-by: Zou Nan hai &lt;nanhai.zou@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
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