kernel.git/arch/blackfin/kernel/setup.c, branch linux-2.6.37.y

Blackfin: BF51x/BF52x: support GPIO Hysteresis/Schmitt Trigger options

2010-08-06T16:55:52Z

Newer parts have optional Hysteresis/Schmitt Trigger options to help with dirty signals. So add some kconfig options for tuning this and enable it by default for people. Signed-off-by: Michael Hennerich Signed-off-by: Mike Frysinger

Blackfin: another year of changes (update copyright in boot log)

2010-05-22T18:19:11Z

Signed-off-by: Mike Frysinger

Blackfin: rewrite resync_core_{i,d}cache() SMP logic to avoid per_cpu data

2010-03-09T05:30:50Z

This functions are implicitly called by core functions like cpu_relax(), and since those functions may be called early on before common code has initialized the per-cpu data area, we need to tweak the stats gathering. Now the statistics are maintained in common bss which makes these funcs safe to use as soon as the C runtime env is setup. Signed-off-by: Graf Yang Signed-off-by: Mike Frysinger

Blackfin: initial XIP support

2010-03-09T05:30:48Z

Signed-off-by: Barry Song Signed-off-by: Mike Frysinger

Blackfin: replace harcoded define with proper THREAD_SIZE macro

2010-03-09T05:30:48Z

Signed-off-by: Barry Song Signed-off-by: Mike Frysinger

Blackfin: fix MPU page permission masks overflow when dealing with async memory

2010-03-09T05:30:46Z

Attempting to use the MPU while doing XIP out of parallel flash hooked up to the async memory bus would often result in random crashes as the MPU slowly corrupted memory. The fallout here is that the async banks gain MPU protection from user space too. So any accesses have to go through the mmap() interface rather than just using hardcoded pointers. Signed-off-by: Barry Song Signed-off-by: Mike Frysinger

Blackfin: allow boards to register early devices

2010-03-09T05:30:45Z

Signed-off-by: Sonic Zhang Signed-off-by: Mike Frysinger

Blackfin: drop 4KB reserve at end of memory

2009-12-15T05:15:50Z

The point of this small chunk was to avoid anomaly 05000310. This never really seemed to do what it was intended though -- no valid CPLBs exist over the reserved memory, and there is often memory before it anyways (due to the uClinux MTD and/or reserved DMA region). Plus, it doesn't address the L1 instruction case. So drop this chunk as it wastes memory and is affront to humanity. Signed-off-by: Barry Song Signed-off-by: Mike Frysinger

Blackfin: announce current cpu rev when booting

2009-12-15T05:15:01Z

User reports rarely include full information, so include this important tidbit up front. It's also good to know at a glance in general. Signed-off-by: Robin Getz Signed-off-by: Mike Frysinger

Blackfin: calculate on-chip lengths at link time rather than run time

2009-12-15T05:13:55Z

Since the link sizes never change at runtime, push the calculation out to the linker script to save some useless calculation costs. Signed-off-by: Mike Frysinger