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<title>kernel.git/arch/arm64/mm/dma-mapping.c, branch master</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
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<updated>2024-05-10T07:04:25Z</updated>
<entry>
<title>arm64: Properly clean up iommu-dma remnants</title>
<updated>2024-05-10T07:04:25Z</updated>
<author>
<name>Robin Murphy</name>
</author>
<published>2024-04-30T10:22:53Z</published>
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<id>urn:sha1:8b80549f1bc692cf9130af8555b6c89cec24e1a6</id>
<content type='text'>
Thanks to the somewhat asymmetrical nature, while removing
iommu_setup_dma_ops() from the arch_setup_dma_ops() flow, I managed to
forget that arm64's teardown path was also specific to iommu-dma. Clean
that up to match, otherwise probe deferral will lead to the arch code
erroneously removing DMA ops set elsewhere.

Reported-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Link: https://lore.kernel.org/linux-iommu/Zi_LV28TR-P-PzXi@eriador.lumag.spb.ru/
Fixes: b67483b3c44e ("iommu/dma: Centralise iommu_setup_dma_ops()")
Signed-off-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Tested-by: Dmitry Baryshkov &lt;dmitry.baryshkov@linaro.org&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Reviewed-by: Konrad Dybcio &lt;konrad.dybcio@linaro.org&gt;
Acked-by: Will Deacon &lt;will@kernel.org&gt;
Tested-by: Nicolin Chen &lt;nicolinc@nvidia.com&gt;
Link: https://lore.kernel.org/r/d4cc20cbb0c45175e98dd76bf187e2ad6421296d.1714472573.git.robin.murphy@arm.com
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>dma-mapping: Simplify arch_setup_dma_ops()</title>
<updated>2024-04-26T10:07:28Z</updated>
<author>
<name>Robin Murphy</name>
</author>
<published>2024-04-19T16:54:46Z</published>
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<id>urn:sha1:f091e93306e0429ebb7589b9874590b6a9705e64</id>
<content type='text'>
The dma_base, size and iommu arguments are only used by ARM, and can
now easily be deduced from the device itself, so there's no need to pass
them through the callchain as well.

Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Christoph Hellwig &lt;hch@lst.de&gt;
Reviewed-by: Michael Kelley &lt;mhklinux@outlook.com&gt; # For Hyper-V
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Link: https://lore.kernel.org/r/5291c2326eab405b1aa7693aa964e8d3cb7193de.1713523152.git.robin.murphy@arm.com
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>iommu/dma: Centralise iommu_setup_dma_ops()</title>
<updated>2024-04-26T10:07:26Z</updated>
<author>
<name>Robin Murphy</name>
</author>
<published>2024-04-19T16:54:45Z</published>
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<id>urn:sha1:b67483b3c44eaef2f771fa4c712e13f452675a67</id>
<content type='text'>
It's somewhat hard to see, but arm64's arch_setup_dma_ops() should only
ever call iommu_setup_dma_ops() after a successful iommu_probe_device(),
which means there should be no harm in achieving the same order of
operations by running it off the back of iommu_probe_device() itself.
This then puts it in line with the x86 and s390 .probe_finalize bodges,
letting us pull it all into the main flow properly. As a bonus this lets
us fold in and de-scope the PCI workaround setup as well.

At this point we can also then pull the call up inside the group mutex,
and avoid having to think about whether iommu_group_store_type() could
theoretically race and free the domain if iommu_setup_dma_ops() ran just
*before* iommu_device_use_default_domain() claims it... Furthermore we
replace one .probe_finalize call completely, since the only remaining
implementations are now one which only needs to run once for the initial
boot-time probe, and two which themselves render that path unreachable.

This leaves us a big step closer to realistically being able to unpick
the variety of different things that iommu_setup_dma_ops() has been
muddling together, and further streamline iommu-dma into core API flows
in future.

Reviewed-by: Lu Baolu &lt;baolu.lu@linux.intel.com&gt; # For Intel IOMMU
Reviewed-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Tested-by: Hanjun Guo &lt;guohanjun@huawei.com&gt;
Signed-off-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Link: https://lore.kernel.org/r/bebea331c1d688b34d9862eefd5ede47503961b8.1713523152.git.robin.murphy@arm.com
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>iommu: Remove struct iommu_ops *iommu from arch_setup_dma_ops()</title>
<updated>2023-12-12T09:18:45Z</updated>
<author>
<name>Jason Gunthorpe</name>
</author>
<published>2023-12-07T18:03:08Z</published>
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<id>urn:sha1:4720287c7bf76e59d19d4dfbdc3f54eeea6fd46b</id>
<content type='text'>
This is not being used to pass ops, it is just a way to tell if an
iommu driver was probed. These days this can be detected directly via
device_iommu_mapped(). Call device_iommu_mapped() in the two places that
need to check it and remove the iommu parameter everywhere.

Reviewed-by: Jerry Snitselaar &lt;jsnitsel@redhat.com&gt;
Reviewed-by: Lu Baolu &lt;baolu.lu@linux.intel.com&gt;
Reviewed-by: Moritz Fischer &lt;mdf@kernel.org&gt;
Acked-by: Christoph Hellwig &lt;hch@lst.de&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Tested-by: Hector Martin &lt;marcan@marcan.st&gt;
Signed-off-by: Jason Gunthorpe &lt;jgg@nvidia.com&gt;
Link: https://lore.kernel.org/r/1-v2-16e4def25ebb+820-iommu_fwspec_p1_jgg@nvidia.com
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>Revert "Revert "arm64: dma: Drop cache invalidation from arch_dma_prep_coherent()""</title>
<updated>2023-03-30T15:23:03Z</updated>
<author>
<name>Will Deacon</name>
</author>
<published>2023-03-30T15:23:03Z</published>
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<id>urn:sha1:7bd6680b47fa4cd53ee1047693c09825e212a6f5</id>
<content type='text'>
This reverts commit b7d9aae404841d9999b7476170867ae441e948d2.

With the Qualcomm remoteproc driver now modified to use a carveout
memory region in 57f72170a2b2 ("remoteproc: qcom_q6v5_mss: Use a
carveout to authenticate modem headers"), we can reinstate c44094eee32f
("arm64: dma: Drop cache invalidation from arch_dma_prep_coherent()")
which relaxes the arm64 implementation of arch_dma_prep_coherent() to
perform only a data cache clean operation, rather than a
clean-and-invalidate.

Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>Revert "arm64: dma: Drop cache invalidation from arch_dma_prep_coherent()"</title>
<updated>2022-12-06T17:30:39Z</updated>
<author>
<name>Will Deacon</name>
</author>
<published>2022-12-06T10:34:03Z</published>
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<id>urn:sha1:b7d9aae404841d9999b7476170867ae441e948d2</id>
<content type='text'>
This reverts commit c44094eee32f32f175aadc0efcac449d99b1bbf7.

Although the semantics of the DMA API require only a clean operation
here, it turns out that the Qualcomm 'qcom_q6v5_mss' remoteproc driver
(ab)uses the DMA API for transferring the modem firmware to the secure
world via calls to Trustzone [1].

Once the firmware buffer has changed hands, _any_ access from the
non-secure side (i.e. Linux) will be detected on the bus and result in a
full system reset [2]. Although this is possible even with this revert
in place (due to speculative reads via the cacheable linear alias of
memory), anecdotally the problem occurs considerably more frequently
when the lines have not been invalidated, assumedly due to some
micro-architectural interactions with the cache hierarchy.

Revert the offending change for now, along with a comment, so that the
Qualcomm developers have time to fix the driver [3] to use a firmware
buffer which does not have a cacheable alias in the linear map.

Link: https://lore.kernel.org/r/20221114110329.68413-1-manivannan.sadhasivam@linaro.org [1]
Link: https://lore.kernel.org/r/CAMi1Hd3H2k1J8hJ6e-Miy5+nVDNzv6qQ3nN-9929B0GbHJkXEg@mail.gmail.com/ [2]
Link: https://lore.kernel.org/r/20221206092152.GD15486@thinkpad [2]
Reported-by: Amit Pundir &lt;amit.pundir@linaro.org&gt;
Reported-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Cc: Thorsten Leemhuis &lt;regressions@leemhuis.info&gt;
Cc: Sibi Sankar &lt;quic_sibis@quicinc.com&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Acked-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Link: https://lore.kernel.org/r/20221206103403.646-1-will@kernel.org
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'iommu-updates-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu</title>
<updated>2022-10-10T20:20:53Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2022-10-10T20:20:53Z</published>
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<id>urn:sha1:f23cdfcd04f7c044ee47dac04484b8d289088776</id>
<content type='text'>
Pull iommu updates from Joerg Roedel:

 - remove the bus_set_iommu() interface which became unnecesary because
   of IOMMU per-device probing

 - make the dma-iommu.h header private

 - Intel VT-d changes from Lu Baolu:
	  - Decouple PASID and PRI from SVA
	  - Add ESRTPS &amp; ESIRTPS capability check
	  - Cleanups

 - Apple DART support for the M1 Pro/MAX SOCs

 - support for AMD IOMMUv2 page-tables for the DMA-API layer.

   The v2 page-tables are compatible with the x86 CPU page-tables. Using
   them for DMA-API prepares support for hardware-assisted IOMMU
   virtualization

 - support for MT6795 Helio X10 M4Us in the Mediatek IOMMU driver

 - some smaller fixes and cleanups

* tag 'iommu-updates-v6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/joro/iommu: (59 commits)
  iommu/vt-d: Avoid unnecessary global DMA cache invalidation
  iommu/vt-d: Avoid unnecessary global IRTE cache invalidation
  iommu/vt-d: Rename cap_5lp_support to cap_fl5lp_support
  iommu/vt-d: Remove pasid_set_eafe()
  iommu/vt-d: Decouple PASID &amp; PRI enabling from SVA
  iommu/vt-d: Remove unnecessary SVA data accesses in page fault path
  dt-bindings: iommu: arm,smmu-v3: Relax order of interrupt names
  iommu: dart: Support t6000 variant
  iommu/io-pgtable-dart: Add DART PTE support for t6000
  iommu/io-pgtable: Add DART subpage protection support
  iommu/io-pgtable: Move Apple DART support to its own file
  iommu/mediatek: Add support for MT6795 Helio X10 M4Us
  iommu/mediatek: Introduce new flag TF_PORT_TO_ADDR_MT8173
  dt-bindings: mediatek: Add bindings for MT6795 M4U
  iommu/iova: Fix module config properly
  iommu/amd: Fix sparse warning
  iommu/amd: Remove outdated comment
  iommu/amd: Free domain ID after domain_flush_pages
  iommu/amd: Free domain id in error path
  iommu/virtio: Fix compile error with viommu_capable()
  ...
</content>
</entry>
<entry>
<title>arm64: dma: Drop cache invalidation from arch_dma_prep_coherent()</title>
<updated>2022-09-22T14:09:31Z</updated>
<author>
<name>Will Deacon</name>
</author>
<published>2022-08-23T12:21:11Z</published>
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<id>urn:sha1:c44094eee32f32f175aadc0efcac449d99b1bbf7</id>
<content type='text'>
arch_dma_prep_coherent() is called when preparing a non-cacheable region
for a consistent DMA buffer allocation. Since the buffer pages may
previously have been written via a cacheable mapping and consequently
allocated as dirty cachelines, the purpose of this function is to remove
these dirty lines from the cache, writing them back so that the
non-coherent device is able to see them.

On arm64, this operation can be achieved with a clean to the point of
coherency; a subsequent invalidation is not required and serves little
purpose in the presence of a cacheable alias (e.g. the linear map),
since clean lines can be speculatively fetched back into the cache after
the invalidation operation has completed.

Relax the cache maintenance in arch_dma_prep_coherent() so that only a
clean, and not a clean-and-invalidate operation is performed.

Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Robin Murphy &lt;robin.murphy@arm.com&gt;
Cc: Christoph Hellwig &lt;hch@lst.de&gt;
Cc: Ard Biesheuvel &lt;ardb@kernel.org&gt;
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
Reviewed-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Link: https://lore.kernel.org/r/20220823122111.17439-1-will@kernel.org
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>iommu/dma: Move public interfaces to linux/iommu.h</title>
<updated>2022-09-07T12:47:00Z</updated>
<author>
<name>Robin Murphy</name>
</author>
<published>2022-08-16T17:28:04Z</published>
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<id>urn:sha1:fa49364cd5e65797014688cba623541083b3e5b0</id>
<content type='text'>
The iommu-dma layer is now mostly encapsulated by iommu_dma_ops, with
only a couple more public interfaces left pertaining to MSI integration.
Since these depend on the main IOMMU API header anyway, move their
declarations there, taking the opportunity to update the half-baked
comments to proper kerneldoc along the way.

Signed-off-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Acked-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/9cd99738f52094e6bed44bfee03fa4f288d20695.1660668998.git.robin.murphy@arm.com
Signed-off-by: Joerg Roedel &lt;jroedel@suse.de&gt;
</content>
</entry>
<entry>
<title>arm64: mm: Remove assembly DMA cache maintenance wrappers</title>
<updated>2022-07-05T12:06:31Z</updated>
<author>
<name>Will Deacon</name>
</author>
<published>2022-06-10T15:12:28Z</published>
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<id>urn:sha1:7eacf1858bc86fe93b457c529a3a40e8b94d5af1</id>
<content type='text'>
Remove the __dma_{flush,map,unmap}_area assembly wrappers and call the
appropriate cache maintenance functions directly from the DMA mapping
callbacks.

Reviewed-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Reviewed-by: Ard Biesheuvel &lt;ardb@kernel.org&gt;
Link: https://lore.kernel.org/r/20220610151228.4562-3-will@kernel.org
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
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