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<title>kernel.git/arch/arm64/kvm, branch linux-5.13.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.13.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.13.y'/>
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<updated>2021-09-15T08:00:58Z</updated>
<entry>
<title>KVM: arm64: Unregister HYP sections from kmemleak in protected mode</title>
<updated>2021-09-15T08:00:58Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2021-08-02T12:38:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0443f768f0184ca7905d39f46a7fb0f40471bf42'/>
<id>urn:sha1:0443f768f0184ca7905d39f46a7fb0f40471bf42</id>
<content type='text'>
commit 47e6223c841e029bfc23c3ce594dac5525cebaf8 upstream.

Booting a KVM host in protected mode with kmemleak quickly results
in a pretty bad crash, as kmemleak doesn't know that the HYP sections
have been taken away. This is specially true for the BSS section,
which is part of the kernel BSS section and registered at boot time
by kmemleak itself.

Unregister the HYP part of the BSS before making that section
HYP-private. The rest of the HYP-specific data is obtained via
the page allocator or lives in other sections, none of which is
subjected to kmemleak.

Fixes: 90134ac9cabb ("KVM: arm64: Protect the .hyp sections from the host")
Reviewed-by: Quentin Perret &lt;qperret@google.com&gt;
Reviewed-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: stable@vger.kernel.org # 5.13
Link: https://lore.kernel.org/r/20210802123830.2195174-3-maz@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Fix off-by-one in range_is_memory</title>
<updated>2021-08-18T07:07:03Z</updated>
<author>
<name>David Brazdil</name>
</author>
<published>2021-07-28T15:32:31Z</published>
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<id>urn:sha1:f3409e925da2315c298d7b5966de7b383e4633db</id>
<content type='text'>
[ Upstream commit facee1be7689f8cf573b9ffee6a5c28ee193615e ]

Hyp checks whether an address range only covers RAM by checking the
start/endpoints against a list of memblock_region structs. However,
the endpoint here is exclusive but internally is treated as inclusive.
Fix the off-by-one error that caused valid address ranges to be
rejected.

Cc: Quentin Perret &lt;qperret@google.com&gt;
Fixes: 90134ac9cabb6 ("KVM: arm64: Protect the .hyp sections from the host")
Signed-off-by: David Brazdil &lt;dbrazdil@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20210728153232.1018911-2-dbrazdil@google.com
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Don't zero the cycle count register when PMCR_EL0.P is set</title>
<updated>2021-07-14T15:06:47Z</updated>
<author>
<name>Alexandru Elisei</name>
</author>
<published>2021-06-18T10:51:39Z</published>
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<id>urn:sha1:33e8f03d5950eeec2415d4287407bb23a3d9ada8</id>
<content type='text'>
[ Upstream commit 2a71fabf6a1bc9162a84e18d6ab991230ca4d588 ]

According to ARM DDI 0487G.a, page D13-3895, setting the PMCR_EL0.P bit to
1 has the following effect:

"Reset all event counters accessible in the current Exception level, not
including PMCCNTR_EL0, to zero."

Similar behaviour is described for AArch32 on page G8-7022. Make it so.

Fixes: c01d6a18023b ("KVM: arm64: pmu: Only handle supported event counters")
Signed-off-by: Alexandru Elisei &lt;alexandru.elisei@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20210618105139.83795-1-alexandru.elisei@arm.com
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Restore PMU configuration on first run</title>
<updated>2021-07-14T15:06:27Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2021-06-03T15:50:02Z</published>
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<id>urn:sha1:f5822ae7d660766ccdd3addd8efb5e56c9a7ae81</id>
<content type='text'>
[ Upstream commit d0c94c49792cf780cbfefe29f81bb8c3b73bc76b ]

Restoring a guest with an active virtual PMU results in no perf
counters being instanciated on the host side. Not quite what
you'd expect from a restore.

In order to fix this, force a writeback of PMCR_EL0 on the first
run of a vcpu (using a new request so that it happens once the
vcpu has been loaded). This will in turn create all the host-side
counters that were missing.

Reported-by: Jinank Jain &lt;jinankj@amazon.de&gt;
Tested-by: Jinank Jain &lt;jinankj@amazon.de&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/87wnrbylxv.wl-maz@kernel.org
Link: https://lore.kernel.org/r/b53dfcf9bbc4db7f96154b1cd5188d72b9766358.camel@amazon.de
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Prevent mixed-width VM creation</title>
<updated>2021-05-27T09:34:33Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2021-05-24T17:07:52Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=66e94d5cafd4decd4f92d16a022ea587d7f4094f'/>
<id>urn:sha1:66e94d5cafd4decd4f92d16a022ea587d7f4094f</id>
<content type='text'>
It looks like we have tolerated creating mixed-width VMs since...
forever. However, that was never the intention, and we'd rather
not have to support that pointless complexity.

Forbid such a setup by making sure all the vcpus have the same
register width.

Reported-by: Steven Price &lt;steven.price@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: stable@vger.kernel.org
Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Link: https://lore.kernel.org/r/20210524170752.1549797-1-maz@kernel.org
</content>
</entry>
<entry>
<title>KVM: arm64: Resolve all pending PC updates before immediate exit</title>
<updated>2021-05-27T09:33:06Z</updated>
<author>
<name>Zenghui Yu</name>
</author>
<published>2021-05-26T14:18:31Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e3e880bb1518eb10a4b4bb4344ed614d6856f190'/>
<id>urn:sha1:e3e880bb1518eb10a4b4bb4344ed614d6856f190</id>
<content type='text'>
Commit 26778aaa134a ("KVM: arm64: Commit pending PC adjustemnts before
returning to userspace") fixed the PC updating issue by forcing an explicit
synchronisation of the exception state on vcpu exit to userspace.

However, we forgot to take into account the case where immediate_exit is
set by userspace and KVM_RUN will exit immediately. Fix it by resolving all
pending PC updates before returning to userspace.

Since __kvm_adjust_pc() relies on a loaded vcpu context, I moved the
immediate_exit checking right after vcpu_load(). We will get some overhead
if immediate_exit is true (which should hopefully be rare).

Fixes: 26778aaa134a ("KVM: arm64: Commit pending PC adjustemnts before returning to userspace")
Signed-off-by: Zenghui Yu &lt;yuzenghui@huawei.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20210526141831.1662-1-yuzenghui@huawei.com
Cc: stable@vger.kernel.org # 5.11
</content>
</entry>
<entry>
<title>KVM: arm64: Fix debug register indexing</title>
<updated>2021-05-15T09:27:59Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2021-05-14T08:05:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=cb853ded1d25e5b026ce115dbcde69e3d7e2e831'/>
<id>urn:sha1:cb853ded1d25e5b026ce115dbcde69e3d7e2e831</id>
<content type='text'>
Commit 03fdfb2690099 ("KVM: arm64: Don't write junk to sysregs on
reset") flipped the register number to 0 for all the debug registers
in the sysreg table, hereby indicating that these registers live
in a separate shadow structure.

However, the author of this patch failed to realise that all the
accessors are using that particular index instead of the register
encoding, resulting in all the registers hitting index 0. Not quite
a valid implementation of the architecture...

Address the issue by fixing all the accessors to use the CRm field
of the encoding, which contains the debug register index.

Fixes: 03fdfb2690099 ("KVM: arm64: Don't write junk to sysregs on reset")
Reported-by: Ricardo Koller &lt;ricarkol@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>KVM: arm64: Commit pending PC adjustemnts before returning to userspace</title>
<updated>2021-05-15T09:27:59Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2021-05-06T14:20:12Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=26778aaa134a9aefdf5dbaad904054d7be9d656d'/>
<id>urn:sha1:26778aaa134a9aefdf5dbaad904054d7be9d656d</id>
<content type='text'>
KVM currently updates PC (and the corresponding exception state)
using a two phase approach: first by setting a set of flags,
then by converting these flags into a state update when the vcpu
is about to enter the guest.

However, this creates a disconnect with userspace if the vcpu thread
returns there with any exception/PC flag set. In this case, the exposed
context is wrong, as userspace doesn't have access to these flags
(they aren't architectural). It also means that these flags are
preserved across a reset, which isn't expected.

To solve this problem, force an explicit synchronisation of the
exception state on vcpu exit to userspace. As an optimisation
for nVHE systems, only perform this when there is something pending.

Reported-by: Zenghui Yu &lt;yuzenghui@huawei.com&gt;
Reviewed-by: Alexandru Elisei &lt;alexandru.elisei@arm.com&gt;
Reviewed-by: Zenghui Yu &lt;yuzenghui@huawei.com&gt;
Tested-by: Zenghui Yu &lt;yuzenghui@huawei.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: stable@vger.kernel.org # 5.11
</content>
</entry>
<entry>
<title>KVM: arm64: Move __adjust_pc out of line</title>
<updated>2021-05-15T09:27:59Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2021-05-06T13:31:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f5e30680616ab09e690b153b7a68ff7dd13e6579'/>
<id>urn:sha1:f5e30680616ab09e690b153b7a68ff7dd13e6579</id>
<content type='text'>
In order to make it easy to call __adjust_pc() from the EL1 code
(in the case of nVHE), rename it to __kvm_adjust_pc() and move
it out of line.

No expected functional change.

Reviewed-by: Alexandru Elisei &lt;alexandru.elisei@arm.com&gt;
Reviewed-by: Zenghui Yu &lt;yuzenghui@huawei.com&gt;
Tested-by: Zenghui Yu &lt;yuzenghui@huawei.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Cc: stable@vger.kernel.org # 5.11
</content>
</entry>
<entry>
<title>KVM: arm64: Mark the host stage-2 memory pools static</title>
<updated>2021-05-15T09:27:59Z</updated>
<author>
<name>Quentin Perret</name>
</author>
<published>2021-05-14T08:56:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3fdc15fe8c6445175d61f0fac111d2ee9354e385'/>
<id>urn:sha1:3fdc15fe8c6445175d61f0fac111d2ee9354e385</id>
<content type='text'>
The host stage-2 memory pools are not used outside of mem_protect.c,
mark them static.

Fixes: 1025c8c0c6ac ("KVM: arm64: Wrap the host with a stage 2")
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Signed-off-by: Quentin Perret &lt;qperret@google.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20210514085640.3917886-3-qperret@google.com
</content>
</entry>
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