<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/arm64/kvm, branch linux-4.5.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.5.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.5.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2016-06-01T19:16:57Z</updated>
<entry>
<title>kvm: arm64: Fix EC field in inject_abt64</title>
<updated>2016-06-01T19:16:57Z</updated>
<author>
<name>Matt Evans</name>
</author>
<published>2016-05-16T12:54:56Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=80491592ca86f8f3f7bf81b5e554996c8c945219'/>
<id>urn:sha1:80491592ca86f8f3f7bf81b5e554996c8c945219</id>
<content type='text'>
commit e4fe9e7dc3828bf6a5714eb3c55aef6260d823a2 upstream.

The EC field of the constructed ESR is conditionally modified by ORing in
ESR_ELx_EC_DABT_LOW for a data abort.  However, ESR_ELx_EC_SHIFT is missing
from this condition.

Signed-off-by: Matt Evans &lt;matt.evans@arm.com&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>arm/arm64: KVM: Fix ioctl error handling</title>
<updated>2016-02-29T09:56:40Z</updated>
<author>
<name>Michael S. Tsirkin</name>
</author>
<published>2016-02-28T15:32:07Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4cad67fca3fc952d6f2ed9e799621f07666a560f'/>
<id>urn:sha1:4cad67fca3fc952d6f2ed9e799621f07666a560f</id>
<content type='text'>
Calling return copy_to_user(...) in an ioctl will not
do the right thing if there's a pagefault:
copy_to_user returns the number of bytes not copied
in this case.

Fix up kvm to do
	return copy_to_user(...)) ?  -EFAULT : 0;

everywhere.

Cc: stable@vger.kernel.org
Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Michael S. Tsirkin &lt;mst@redhat.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: vgic-v3: Restore ICH_APR0Rn_EL2 before ICH_APR1Rn_EL2</title>
<updated>2016-02-24T17:25:58Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2016-02-17T10:25:05Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fd451b90e78c4178bcfc5072f2b2b637500c109a'/>
<id>urn:sha1:fd451b90e78c4178bcfc5072f2b2b637500c109a</id>
<content type='text'>
The GICv3 architecture spec says:

Writing to the active priority registers in any order other than
the following order will result in UNPREDICTABLE behavior:
- ICH_AP0R&lt;n&gt;_EL2.
- ICH_AP1R&lt;n&gt;_EL2.

So let's not pointlessly go against the rule...

Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: Configure TCR_EL2.PS at runtime</title>
<updated>2016-02-11T13:16:47Z</updated>
<author>
<name>Tirumalesh Chalamarla</name>
</author>
<published>2016-02-10T18:46:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3c5b1d92b3b02be07873d611a27950addff544d3'/>
<id>urn:sha1:3c5b1d92b3b02be07873d611a27950addff544d3</id>
<content type='text'>
Setting TCR_EL2.PS to 40 bits is wrong on systems with less that
less than 40 bits of physical addresses. and breaks KVM on systems
where the RAM is above 40 bits.

This patch uses ID_AA64MMFR0_EL1.PARange to set TCR_EL2.PS dynamically,
just like we already do for VTCR_EL2.PS.

[Marc: rewrote commit message, patch tidy up]

Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Tirumalesh Chalamarla &lt;tchalamarla@caviumnetworks.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: Fix guest dead loop when register accessor returns false</title>
<updated>2016-01-24T21:56:01Z</updated>
<author>
<name>Shannon Zhao</name>
</author>
<published>2016-01-13T09:16:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6327f35a2010c06a3bc2bfb14202a38764fb9920'/>
<id>urn:sha1:6327f35a2010c06a3bc2bfb14202a38764fb9920</id>
<content type='text'>
Currently emulate_cp will return 0 (Handled) no matter what the accessor
returns. If register accessor returns false, it will not skip current PC
while emulate_cp return handled. Then guest will stuck in a dead loop.

Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Shannon Zhao &lt;shannon.zhao@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: Fix comments of the CP handler</title>
<updated>2016-01-24T21:56:00Z</updated>
<author>
<name>Shannon Zhao</name>
</author>
<published>2016-01-13T09:16:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7769db905bd2df08e844b645437f4729fc1c4d20'/>
<id>urn:sha1:7769db905bd2df08e844b645437f4729fc1c4d20</id>
<content type='text'>
Make sure the documentation reflects the actual name of the functions.

Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Shannon Zhao &lt;shannon.zhao@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: Obey RES0/1 reserved bits when setting CPTR_EL2</title>
<updated>2016-01-24T21:55:58Z</updated>
<author>
<name>Dave Martin</name>
</author>
<published>2016-01-19T16:20:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a7e0ac295d964086af3bf98352614f33c381213e'/>
<id>urn:sha1:a7e0ac295d964086af3bf98352614f33c381213e</id>
<content type='text'>
Some bits in CPTR are defined as RES1 in the architecture.  Setting
these bits to zero may unintentionally enable future architecture
extensions, allowing guests to use them without supervision by the host.

This would be bad: for forwards compatibility, this patch makes
sure the affected bits are always written with 1, not 0.

This patch only addresses CPTR_EL2.  Initialisation of other system
registers may still need review.

Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Dave Martin &lt;Dave.Martin@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: Fix AArch64 guest userspace exception injection</title>
<updated>2016-01-24T21:55:57Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2016-01-06T18:29:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8fc153cda9c9e6aed2a4a7235970dd6c6cb6e954'/>
<id>urn:sha1:8fc153cda9c9e6aed2a4a7235970dd6c6cb6e954</id>
<content type='text'>
At the moment, our fault injection is pretty limited. We always
generate a SYNC exception into EL1, as if the fault was actually
from EL1h, no matter how it was generated.

This is obviously wrong, as EL0 can generate faults of its own
(not to mention the pretty-much unused EL1t mode).

This patch fixes it by implementing section D1.10.2 of the ARMv8 ARM,
and in particular table D1-7 ("Vector offsets from vector table base
address"), which describes which vector to use depending on the source
exception level and type (synchronous, IRQ, FIQ or SError).

Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Tested-by: Shannon Zhao &lt;shannon.zhao@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: Add support for 16-bit VMID</title>
<updated>2015-12-18T10:15:12Z</updated>
<author>
<name>Vladimir Murzin</name>
</author>
<published>2015-11-16T11:28:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=20475f784d29991b3b843c80c38a36f2ebb35ac4'/>
<id>urn:sha1:20475f784d29991b3b843c80c38a36f2ebb35ac4</id>
<content type='text'>
The ARMv8.1 architecture extension allows to choose between 8-bit and
16-bit of VMID, so use this capability for KVM.

Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Vladimir Murzin &lt;vladimir.murzin@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: debug: Remove spurious inline attributes</title>
<updated>2015-12-18T10:15:11Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2015-12-16T15:41:12Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=281243cbe075d27ab884858d6e0b15d8ed61bc25'/>
<id>urn:sha1:281243cbe075d27ab884858d6e0b15d8ed61bc25</id>
<content type='text'>
The debug trapping code is pretty heavy on the "inline" attribute,
but most functions are actually referenced in the sysreg tables,
making the inlining imposible.

Removing the useless inline qualifier seems the right thing to do,
having verified that the output code is similar.

Cc: Alex Bennée &lt;alex.bennee@linaro.org&gt;
Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
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