<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/arm64/kvm, branch linux-4.13.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.13.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.13.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2017-11-08T09:17:17Z</updated>
<entry>
<title>arm/arm64: kvm: Disable branch profiling in HYP code</title>
<updated>2017-11-08T09:17:17Z</updated>
<author>
<name>Julien Thierry</name>
</author>
<published>2017-10-20T11:34:17Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7a598f936b4b748ab1287c5d76ae203153ff5bd6'/>
<id>urn:sha1:7a598f936b4b748ab1287c5d76ae203153ff5bd6</id>
<content type='text'>
commit f9b269f3098121b5d54aaf822e0898c8ed1d3fec upstream.

When HYP code runs into branch profiling code, it attempts to jump to
unmapped memory, causing a HYP Panic.

Disable the branch profiling for code designed to run at HYP mode.

Signed-off-by: Julien Thierry &lt;julien.thierry@arm.com&gt;
Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: Russell King &lt;linux@armlinux.org.uk&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>arm/arm64: KVM: set right LR register value for 32 bit guest when inject abort</title>
<updated>2017-11-08T09:17:17Z</updated>
<author>
<name>Dongjiu Geng</name>
</author>
<published>2017-10-17T14:23:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f82ec727d7f29868c69bb382024f6c6bb31dcbbd'/>
<id>urn:sha1:f82ec727d7f29868c69bb382024f6c6bb31dcbbd</id>
<content type='text'>
commit fd6c8c206fc5d0717b0433b191de0715122f33bb upstream.

When a exception is trapped to EL2, hardware uses  ELR_ELx to hold
the current fault instruction address. If KVM wants to inject a
abort to 32 bit guest, it needs to set the LR register for the
guest to emulate this abort happened in the guest. Because ARM32
architecture is pipelined execution, so the LR value has an offset to
the fault instruction address.

The offsets applied to Link value for exceptions as shown below,
which should be added for the ARM32 link register(LR).

Table taken from ARMv8 ARM DDI0487B-B, table G1-10:
Exception			Offset, for PE state of:
				A32 	  T32
Undefined Instruction 		+4 	  +2
Prefetch Abort 			+4 	  +4
Data Abort 			+8 	  +8
IRQ or FIQ 			+4 	  +4

  [ Removed unused variables in inject_abt to avoid compile warnings.
    -- Christoffer ]

Signed-off-by: Dongjiu Geng &lt;gengdongjiu@huawei.com&gt;
Tested-by: Haibin Zhang &lt;zhanghaibin7@huawei.com&gt;
Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;cdall@linaro.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>KVM: arm/arm64: PMU: Fix overflow interrupt injection</title>
<updated>2017-07-25T13:18:01Z</updated>
<author>
<name>Andrew Jones</name>
</author>
<published>2017-07-01T16:26:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d9f89b4e9290e46cd9b273e9ad0bff0f93e86fae'/>
<id>urn:sha1:d9f89b4e9290e46cd9b273e9ad0bff0f93e86fae</id>
<content type='text'>
kvm_pmu_overflow_set() is called from perf's interrupt handler,
making the call of kvm_vgic_inject_irq() from it introduced with
"KVM: arm/arm64: PMU: remove request-less vcpu kick" a really bad
idea, as it's quite easy to try and retake a lock that the
interrupted context is already holding. The fix is to use a vcpu
kick, leaving the interrupt injection to kvm_pmu_sync_hwstate(),
like it was doing before the refactoring. We don't just revert,
though, because before the kick was request-less, leaving the vcpu
exposed to the request-less vcpu kick race, and also because the
kick was used unnecessarily from register access handlers.

Reviewed-by: Christoffer Dall &lt;cdall@linaro.org&gt;
Signed-off-by: Andrew Jones &lt;drjones@redhat.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'trace-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace</title>
<updated>2017-07-07T02:45:45Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2017-07-07T02:45:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2074006dace5d289d90f2bd31ae1e4bc94965f55'/>
<id>urn:sha1:2074006dace5d289d90f2bd31ae1e4bc94965f55</id>
<content type='text'>
Pull tracing updates from Steven Rostedt:
 "The new features of this release:

   - Added TRACE_DEFINE_SIZEOF() which allows trace events that use
     sizeof() it the TP_printk() to be converted to the actual size such
     that trace-cmd and perf can parse them correctly.

   - Some rework of the TRACE_DEFINE_ENUM() such that the above
     TRACE_DEFINE_SIZEOF() could reuse the same code.

   - Recording of tgid (Thread Group ID). This is similar to how task
     COMMs are recorded (cached at sched_switch), where it is in a table
     and used on output of the trace and trace_pipe files.

   - Have ":mod:&lt;module&gt;" be cached when written into set_ftrace_filter.
     Then the functions of the module will be traced at module load.

   - Some random clean ups and small fixes"

* tag 'trace-v4.13' of git://git.kernel.org/pub/scm/linux/kernel/git/rostedt/linux-trace: (26 commits)
  ftrace: Test for NULL iter-&gt;tr in regex for stack_trace_filter changes
  ftrace: Decrement count for dyn_ftrace_total_info for init functions
  ftrace: Unlock hash mutex on failed allocation in process_mod_list()
  tracing: Add support for display of tgid in trace output
  tracing: Add support for recording tgid of tasks
  ftrace: Decrement count for dyn_ftrace_total_info file
  ftrace: Remove unused function ftrace_arch_read_dyn_info()
  sh/ftrace: Remove only user of ftrace_arch_read_dyn_info()
  ftrace: Have cached module filters be an active filter
  ftrace: Implement cached modules tracing on module load
  ftrace: Have the cached module list show in set_ftrace_filter
  ftrace: Add :mod: caching infrastructure to trace_array
  tracing: Show address when function names are not found
  ftrace: Add missing comment for FTRACE_OPS_FL_RCU
  tracing: Rename update the enum_map file
  tracing: Add TRACE_DEFINE_SIZEOF() macros
  tracing: define TRACE_DEFINE_SIZEOF() macro to map sizeof's to their values
  tracing: Rename enum_replace to eval_replace
  trace: rename enum_map functions
  trace: rename trace.c enum functions
  ...
</content>
</entry>
<entry>
<title>arm64/kvm: vgic: use SYS_DESC()</title>
<updated>2017-06-15T08:45:08Z</updated>
<author>
<name>Mark Rutland</name>
</author>
<published>2017-06-05T13:20:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0959db6c0b069739ffedf3f6b97644213df586d4'/>
<id>urn:sha1:0959db6c0b069739ffedf3f6b97644213df586d4</id>
<content type='text'>
Almost all of the arm64 KVM code uses the sysreg mnemonics for AArch64
register descriptions. Move the last straggler over.

To match what we do for SYS_ICH_AP*R*_EL2, the SYS_ICC_AP*R*_EL1
mnemonics are expanded in &lt;asm/sysreg.h&gt;.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: kvmarm@lists.cs.columbia.edu
Acked-by: Christoffer Dall &lt;cdall@linaro.org&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;cdall@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64/kvm: sysreg: fix typo'd SYS_ICC_IGRPEN*_EL1</title>
<updated>2017-06-15T08:45:07Z</updated>
<author>
<name>Mark Rutland</name>
</author>
<published>2017-06-05T13:20:00Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=21bc52817772a5af6a8a5a750c676ea4a02d4d3b'/>
<id>urn:sha1:21bc52817772a5af6a8a5a750c676ea4a02d4d3b</id>
<content type='text'>
Per ARM DDI 0487B.a, the registers are named ICC_IGRPEN*_EL1 rather than
ICC_GRPEN*_EL1. Correct our mnemonics and comments to match, before we
add more GICv3 register definitions.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: kvmarm@lists.cs.columbia.edu
Acked-by: Christoffer Dall &lt;cdall@linaro.org&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;cdall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Log an error if trapping a write-to-read-only GICv3 access</title>
<updated>2017-06-15T08:45:07Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2017-06-09T11:49:56Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7b1dba1f7325629427c0e5bdf014159b229d16c8'/>
<id>urn:sha1:7b1dba1f7325629427c0e5bdf014159b229d16c8</id>
<content type='text'>
A write-to-read-only GICv3 access should UNDEF at EL1. But since
we're in complete paranoia-land with broken CPUs, let's assume the
worse and gracefully handle the case.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Reviewed-by: Christoffer Dall &lt;cdall@linaro.org&gt;
Signed-off-by: Christoffer Dall &lt;cdall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Log an error if trapping a read-from-write-only GICv3 access</title>
<updated>2017-06-15T08:45:06Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2017-06-09T11:49:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e7f1d1eef482150a64a6e6ad8faf40f8f97eed67'/>
<id>urn:sha1:e7f1d1eef482150a64a6e6ad8faf40f8f97eed67</id>
<content type='text'>
A read-from-write-only GICv3 access should UNDEF at EL1. But since
we're in complete paranoia-land with broken CPUs, let's assume the
worse and gracefully handle the case.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Reviewed-by: Christoffer Dall &lt;cdall@linaro.org&gt;
Signed-off-by: Christoffer Dall &lt;cdall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: vgic-v3: Add hook to handle guest GICv3 sysreg accesses at EL2</title>
<updated>2017-06-15T08:44:59Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2017-06-09T11:49:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=59da1cbfd840d69bd7a310249924da3fc202c417'/>
<id>urn:sha1:59da1cbfd840d69bd7a310249924da3fc202c417</id>
<content type='text'>
In order to start handling guest access to GICv3 system registers,
let's add a hook that will get called when we trap a system register
access. This is gated by a new static key (vgic_v3_cpuif_trap).

Tested-by: Alexander Graf &lt;agraf@suse.de&gt;
Acked-by: David Daney &lt;david.daney@cavium.com&gt;
Reviewed-by: Eric Auger &lt;eric.auger@redhat.com&gt;
Reviewed-by: Christoffer Dall &lt;cdall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;cdall@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'kvmarm-master/master' into HEAD</title>
<updated>2017-06-15T08:35:15Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2017-06-15T08:35:15Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=6f2f10cabe73944488a62df16695c86e20d4c3f9'/>
<id>urn:sha1:6f2f10cabe73944488a62df16695c86e20d4c3f9</id>
<content type='text'>
</content>
</entry>
</feed>
