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<title>kernel.git/arch/arm64/kvm, branch linux-3.13.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.13.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.13.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2013-11-15T04:51:36Z</updated>
<entry>
<title>Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm</title>
<updated>2013-11-15T04:51:36Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2013-11-15T04:51:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f080480488028bcc25357f85e8ae54ccc3bb7173'/>
<id>urn:sha1:f080480488028bcc25357f85e8ae54ccc3bb7173</id>
<content type='text'>
Pull KVM changes from Paolo Bonzini:
 "Here are the 3.13 KVM changes.  There was a lot of work on the PPC
  side: the HV and emulation flavors can now coexist in a single kernel
  is probably the most interesting change from a user point of view.

  On the x86 side there are nested virtualization improvements and a few
  bugfixes.

  ARM got transparent huge page support, improved overcommit, and
  support for big endian guests.

  Finally, there is a new interface to connect KVM with VFIO.  This
  helps with devices that use NoSnoop PCI transactions, letting the
  driver in the guest execute WBINVD instructions.  This includes some
  nVidia cards on Windows, that fail to start without these patches and
  the corresponding userspace changes"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (146 commits)
  kvm, vmx: Fix lazy FPU on nested guest
  arm/arm64: KVM: PSCI: propagate caller endianness to the incoming vcpu
  arm/arm64: KVM: MMIO support for BE guest
  kvm, cpuid: Fix sparse warning
  kvm: Delete prototype for non-existent function kvm_check_iopl
  kvm: Delete prototype for non-existent function complete_pio
  hung_task: add method to reset detector
  pvclock: detect watchdog reset at pvclock read
  kvm: optimize out smp_mb after srcu_read_unlock
  srcu: API for barrier after srcu read unlock
  KVM: remove vm mmap method
  KVM: IOMMU: hva align mapping page size
  KVM: x86: trace cpuid emulation when called from emulator
  KVM: emulator: cleanup decode_register_operand() a bit
  KVM: emulator: check rex prefix inside decode_register()
  KVM: x86: fix emulation of "movzbl %bpl, %eax"
  kvm_host: typo fix
  KVM: x86: emulate SAHF instruction
  MAINTAINERS: add tree for kvm.git
  Documentation/kvm: add a 00-INDEX file
  ...
</content>
</entry>
<entry>
<title>Merge tag 'kvm-arm64/for-3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into kvm-next</title>
<updated>2013-11-11T11:05:20Z</updated>
<author>
<name>Paolo Bonzini</name>
</author>
<published>2013-11-11T11:05:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ede582224231e64e41af0f89117a302580a2da2e'/>
<id>urn:sha1:ede582224231e64e41af0f89117a302580a2da2e</id>
<content type='text'>
A handful of fixes for KVM/arm64:

- A couple a basic fixes for running BE guests on a LE host
- A performance improvement for overcommitted VMs (same as the equivalent
  patch for ARM)

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;

Conflicts:
	arch/arm/include/asm/kvm_emulate.h
	arch/arm64/include/asm/kvm_emulate.h
</content>
</entry>
<entry>
<title>arm64: KVM: vgic: byteswap GICv2 access on world switch if BE</title>
<updated>2013-11-06T10:10:12Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2013-11-05T18:29:46Z</published>
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<id>urn:sha1:c5b2c0f5203b3bc678a8967daedf7114029975ae</id>
<content type='text'>
Ensure that accesses to the GICH_* registers are byteswapped
when the kernel is compiled as big-endian.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: initialize HYP mode following the kernel endianness</title>
<updated>2013-11-06T10:10:01Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2013-11-05T18:29:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=18ea3dbc9e5c8a53a361b17c4a5676ea6f4bcb72'/>
<id>urn:sha1:18ea3dbc9e5c8a53a361b17c4a5676ea6f4bcb72</id>
<content type='text'>
Force SCTLR_EL2.EE to 1 if the kernel is compiled as BE.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: Yield CPU when vcpu executes a WFE</title>
<updated>2013-10-29T18:25:25Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2013-08-02T10:41:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d241aac798eb042e605f78c31a4122e583b2cd13'/>
<id>urn:sha1:d241aac798eb042e605f78c31a4122e583b2cd13</id>
<content type='text'>
On an (even slightly) oversubscribed system, spinlocks are quickly
becoming a bottleneck, as some vcpus are spinning, waiting for a
lock to be released, while the vcpu holding the lock may not be
running at all.

The solution is to trap blocking WFEs and tell KVM that we're
now spinning. This ensures that other vpus will get a scheduling
boost, allowing the lock to be released more quickly. Also, using
CONFIG_HAVE_KVM_CPU_RELAX_INTERCEPT slightly improves the performance
when the VM is severely overcommited.

Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM64: KVM: Implement kvm_vcpu_preferred_target() function</title>
<updated>2013-10-02T18:29:40Z</updated>
<author>
<name>Anup Patel</name>
</author>
<published>2013-09-30T08:50:06Z</published>
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<id>urn:sha1:473bdc0e6565ebb22455657a40daa21b6b4ee16b</id>
<content type='text'>
This patch implements kvm_vcpu_preferred_target() function for
KVM ARM64 which will help us implement KVM_ARM_PREFERRED_TARGET
ioctl for user space.

Signed-off-by: Anup Patel &lt;anup.patel@linaro.org&gt;
Signed-off-by: Pranavkumar Sawargaonkar &lt;pranavkumar@linaro.org&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: add missing dsb before invalidating Stage-2 TLBs</title>
<updated>2013-08-09T12:19:28Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2013-06-11T17:05:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f142e5eeb724cfbedd203b32b3b542d78dbe2545'/>
<id>urn:sha1:f142e5eeb724cfbedd203b32b3b542d78dbe2545</id>
<content type='text'>
When performing a Stage-2 TLB invalidation, it is necessary to
make sure the write to the page tables is observable by all CPUs.

For this purpose, add dsb instructions to __kvm_tlb_flush_vmid_ipa
and __kvm_flush_vm_context before doing the TLB invalidation itself.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: perform save/restore of PAR_EL1</title>
<updated>2013-08-09T12:19:28Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2013-06-07T10:02:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1bbd80549810637b7381ab0649ba7c7d62f1342a'/>
<id>urn:sha1:1bbd80549810637b7381ab0649ba7c7d62f1342a</id>
<content type='text'>
Not saving PAR_EL1 is an unfortunate oversight. If the guest
performs an AT* operation and gets scheduled out before reading
the result of the translation from PAREL1, it could become
corrupted by another guest or the host.

Saving this register is made slightly more complicated as KVM also
uses it on the permission fault handling path, leading to an ugly
"stash and restore" sequence. Fortunately, this is already a slow
path so we don't really care. Also, Linux doesn't do any AT*
operation, so Linux guests are not impacted by this bug.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: Kconfig integration</title>
<updated>2013-07-04T12:40:26Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2013-07-04T12:34:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c3eb5b14449a0949e9764d39374a2ea63faae14f'/>
<id>urn:sha1:c3eb5b14449a0949e9764d39374a2ea63faae14f</id>
<content type='text'>
Finally plug KVM/arm64 into the config system, making it possible
to enable KVM support on AArch64 CPUs.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>arm64: KVM: enable initialization of a 32bit vcpu</title>
<updated>2013-06-12T15:42:18Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2013-02-07T10:46:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0d854a60b1d7d39a37b25dd28f63cfa0df637b91'/>
<id>urn:sha1:0d854a60b1d7d39a37b25dd28f63cfa0df637b91</id>
<content type='text'>
Wire the init of a 32bit vcpu by allowing 32bit modes in pstate,
and providing sensible defaults out of reset state.

This feature is of course conditioned by the presence of 32bit
capability on the physical CPU, and is checked by the KVM_CAP_ARM_EL1_32BIT
capability.

Reviewed-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
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