kernel.git/arch/arm64/kvm, branch linux-3.11.yHosts the 0x221E linux distro kernel.
https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.11.y2013-08-09T12:19:28Zarm64: KVM: add missing dsb before invalidating Stage-2 TLBs2013-08-09T12:19:28ZMarc Zyngier2013-06-11T17:05:25Zurn:sha1:f142e5eeb724cfbedd203b32b3b542d78dbe2545
When performing a Stage-2 TLB invalidation, it is necessary to
make sure the write to the page tables is observable by all CPUs.
For this purpose, add dsb instructions to __kvm_tlb_flush_vmid_ipa
and __kvm_flush_vm_context before doing the TLB invalidation itself.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arm64: KVM: perform save/restore of PAR_EL12013-08-09T12:19:28ZMarc Zyngier2013-06-07T10:02:34Zurn:sha1:1bbd80549810637b7381ab0649ba7c7d62f1342a
Not saving PAR_EL1 is an unfortunate oversight. If the guest
performs an AT* operation and gets scheduled out before reading
the result of the translation from PAREL1, it could become
corrupted by another guest or the host.
Saving this register is made slightly more complicated as KVM also
uses it on the permission fault handling path, leading to an ugly
"stash and restore" sequence. Fortunately, this is already a slow
path so we don't really care. Also, Linux doesn't do any AT*
operation, so Linux guests are not impacted by this bug.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arm64: KVM: Kconfig integration2013-07-04T12:40:26ZMarc Zyngier2013-07-04T12:34:32Zurn:sha1:c3eb5b14449a0949e9764d39374a2ea63faae14f
Finally plug KVM/arm64 into the config system, making it possible
to enable KVM support on AArch64 CPUs.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
arm64: KVM: enable initialization of a 32bit vcpu2013-06-12T15:42:18ZMarc Zyngier2013-02-07T10:46:46Zurn:sha1:0d854a60b1d7d39a37b25dd28f63cfa0df637b91
Wire the init of a 32bit vcpu by allowing 32bit modes in pstate,
and providing sensible defaults out of reset state.
This feature is of course conditioned by the presence of 32bit
capability on the physical CPU, and is checked by the KVM_CAP_ARM_EL1_32BIT
capability.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arm64: KVM: 32bit guest fault injection2013-06-12T15:42:18ZMarc Zyngier2013-02-06T11:29:35Zurn:sha1:e82e030556e42e823e174e0c3bd97988d1a09d1f
Add fault injection capability for 32bit guests.
Reviewed-by: Christopher Covington <cov@codeaurora.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arm64: KVM: 32bit specific register world switch2013-06-12T15:42:17ZMarc Zyngier2013-02-07T10:52:10Zurn:sha1:b4afad06c19e3489767532f86ff453a1d1e28b8c
Allow registers specific to 32bit guests to be saved/restored
during the world switch.
Reviewed-by: Christopher Covington <cov@codeaurora.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arm64: KVM: CPU specific 32bit coprocessor access2013-06-12T15:42:16ZMarc Zyngier2013-02-07T10:50:18Zurn:sha1:06c7654d2fb8bac7b1af4340ad59434a5d89b86a
Enable handling of CPU specific 32bit coprocessor access. Not much
here either.
Reviewed-by: Christopher Covington <cov@codeaurora.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arm64: KVM: 32bit handling of coprocessor traps2013-06-12T15:42:16ZMarc Zyngier2013-02-07T10:32:33Zurn:sha1:62a89c44954f09072bf07a714c8f68bda14ab87e
Provide the necessary infrastructure to trap coprocessor accesses that
occur when running 32bit guests.
Also wire SMC and HVC trapped in 32bit mode while were at it.
Reviewed-by: Christopher Covington <cov@codeaurora.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arm64: KVM: 32bit conditional execution emulation2013-06-12T15:42:15ZMarc Zyngier2013-02-06T19:54:04Zurn:sha1:27b190bd9fbfee34536cb858f0b5924d294aac38
As conditional instructions can trap on AArch32, add the thinest
possible emulation layer to keep 32bit guests happy.
Reviewed-by: Christopher Covington <cov@codeaurora.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arm64: KVM: 32bit GP register access2013-06-12T15:42:14ZMarc Zyngier2013-02-06T19:40:29Zurn:sha1:b547631fc64e249a3c507e6ce854642507fa7c1c
Allow access to the 32bit register file through the usual API.
Reviewed-by: Christopher Covington <cov@codeaurora.org>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>