<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/arm64/kvm/config.c, branch master</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=master</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2026-02-05T09:02:13Z</updated>
<entry>
<title>KVM: arm64: Add sanitisation to SCTLR_EL2</title>
<updated>2026-02-05T09:02:13Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2026-02-02T18:43:28Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e8ef27900c6a8c0727dcf62d4112d08c5046d33e'/>
<id>urn:sha1:e8ef27900c6a8c0727dcf62d4112d08c5046d33e</id>
<content type='text'>
Sanitise SCTLR_EL2 the usual way. The most important aspect of
this is that we benefit from SCTLR_EL2.SPAN being RES1 when
HCR_EL2.E2H==0.

Reviewed-by: Fuad Tabba &lt;tabba@google.com&gt;
Tested-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://patch.msgid.link/20260202184329.2724080-20-maz@kernel.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Remove all traces of HCR_EL2.MIOCNCE</title>
<updated>2026-02-05T09:02:13Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2026-02-02T18:43:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fb40cb15e8ad1e7511966a953de0f409aaae4398'/>
<id>urn:sha1:fb40cb15e8ad1e7511966a953de0f409aaae4398</id>
<content type='text'>
MIOCNCE had the potential to eat your data, and also was never
implemented by anyone. It's been retrospectively removed from
the architecture, and we're happy to follow that lead.

Reviewed-by: Fuad Tabba &lt;tabba@google.com&gt;
Tested-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://patch.msgid.link/20260202184329.2724080-19-maz@kernel.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Remove all traces of FEAT_TME</title>
<updated>2026-02-05T09:02:13Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2026-02-02T18:43:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d65bf6e317e7bb13612bd94e01c5a11b6fc67e9d'/>
<id>urn:sha1:d65bf6e317e7bb13612bd94e01c5a11b6fc67e9d</id>
<content type='text'>
FEAT_TME has been dropped from the architecture. Retrospectively.
I'm sure someone is crying somewhere, but most of us won't.

Clean-up time.

Reviewed-by: Fuad Tabba &lt;tabba@google.com&gt;
Tested-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://patch.msgid.link/20260202184329.2724080-18-maz@kernel.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Simplify handling of full register invalid constraint</title>
<updated>2026-02-05T09:02:13Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2026-02-02T18:43:25Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d784cfe697abdfd53f332d39d0cffcf03cbcafaa'/>
<id>urn:sha1:d784cfe697abdfd53f332d39d0cffcf03cbcafaa</id>
<content type='text'>
Now that we embed the RESx bits in the register description, it becomes
easier to deal with registers that are simply not valid, as their
existence is not satisfied by the configuration (SCTLR2_ELx without
FEAT_SCTLR2, for example). Such registers essentially become RES0 for
any bit that wasn't already advertised as RESx.

Reviewed-by: Fuad Tabba &lt;tabba@google.com&gt;
Tested-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://patch.msgid.link/20260202184329.2724080-17-maz@kernel.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Get rid of FIXED_VALUE altogether</title>
<updated>2026-02-05T09:02:13Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2026-02-02T18:43:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ab1f377b4c930e8d117cc461bd64d5866fc6aab8'/>
<id>urn:sha1:ab1f377b4c930e8d117cc461bd64d5866fc6aab8</id>
<content type='text'>
We have now killed every occurrences of FIXED_VALUE, and we can therefore
drop the whole infrastructure. Good riddance.

Reviewed-by: Fuad Tabba &lt;tabba@google.com&gt;
Tested-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://patch.msgid.link/20260202184329.2724080-16-maz@kernel.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Simplify handling of HCR_EL2.E2H RESx</title>
<updated>2026-02-05T09:02:13Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2026-02-02T18:43:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f01e3429cf0e4b1ab20c9d51ebfa0d8514d8fe4d'/>
<id>urn:sha1:f01e3429cf0e4b1ab20c9d51ebfa0d8514d8fe4d</id>
<content type='text'>
Now that we can link the RESx behaviour with the value of HCR_EL2.E2H,
we can trivially express the tautological constraint that makes E2H
a reserved value at all times.

Fun, isn't it?

Reviewed-by: Fuad Tabba &lt;tabba@google.com&gt;
Tested-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://patch.msgid.link/20260202184329.2724080-15-maz@kernel.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Move RESx into individual register descriptors</title>
<updated>2026-02-05T09:02:13Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2026-02-02T18:43:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d2f629aa75bef1c346f17ca195271582dafc6f3b'/>
<id>urn:sha1:d2f629aa75bef1c346f17ca195271582dafc6f3b</id>
<content type='text'>
Instead of hacking the RES1 bits at runtime, move them into the
register descriptors. This makes it significantly nicer.

Reviewed-by: Fuad Tabba &lt;tabba@google.com&gt;
Tested-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://patch.msgid.link/20260202184329.2724080-14-maz@kernel.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Add RES1_WHEN_E2Hx constraints as configuration flags</title>
<updated>2026-02-05T09:02:12Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2026-02-02T18:43:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d406fcb2030e3efe2c5a7f043028cb3727f522d8'/>
<id>urn:sha1:d406fcb2030e3efe2c5a7f043028cb3727f522d8</id>
<content type='text'>
"Thanks" to VHE, SCTLR_EL2 radically changes shape depending on the
value of HCR_EL2.E2H, as a lot of the bits that didn't have much
meaning with E2H=0 start impacting EL0 with E2H=1.

This has a direct impact on the RESx behaviour of these bits, and
we need a way to express them.

For this purpose, introduce two new constaints that, when the
controlling feature is not present, force the field to RES1 depending
on the value of E2H. Note that RES0 is still implicit,

This allows diverging RESx values depending on the value of E2H,
something that is required by a bunch of SCTLR_EL2 bits.

Reviewed-by: Fuad Tabba &lt;tabba@google.com&gt;
Tested-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://patch.msgid.link/20260202184329.2724080-13-maz@kernel.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Add REQUIRES_E2H1 constraint as configuration flags</title>
<updated>2026-02-05T09:01:41Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2026-02-02T18:43:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ad90512f12fef5506d1f72cdfbd720eb701eab8c'/>
<id>urn:sha1:ad90512f12fef5506d1f72cdfbd720eb701eab8c</id>
<content type='text'>
A bunch of EL2 configuration are very similar to their EL1 counterpart,
with the added constraint that HCR_EL2.E2H being 1.

For us, this means HCR_EL2.E2H being RES1, which is something we can
statically evaluate.

Add a REQUIRES_E2H1 constraint, which allows us to express conditions
in a much simpler way (without extra code). Existing occurrences are
converted, before we add a lot more.

Reviewed-by: Fuad Tabba &lt;tabba@google.com&gt;
Tested-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://patch.msgid.link/20260202184329.2724080-12-maz@kernel.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Simplify FIXED_VALUE handling</title>
<updated>2026-02-05T09:01:41Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2026-02-02T18:43:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8d94458263bb2d44d8ba461327a1e18c05cfc453'/>
<id>urn:sha1:8d94458263bb2d44d8ba461327a1e18c05cfc453</id>
<content type='text'>
The FIXED_VALUE qualifier (mostly used for HCR_EL2) is pointlessly
complicated, as it tries to piggy-back on the previous RES0 handling
while being done in a different phase, on different data.

Instead, make it an integral part of the RESx computation, and allow
it to directly set RESx bits. This is much easier to understand.

It also paves the way for some additional changes to that will allow
the full removal of the FIXED_VALUE handling.

Reviewed-by: Fuad Tabba &lt;tabba@google.com&gt;
Tested-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://patch.msgid.link/20260202184329.2724080-11-maz@kernel.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
</feed>
