<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/arm64/kvm/arch_timer.c, branch master</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=master</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2026-01-15T15:55:50Z</updated>
<entry>
<title>KVM: arm64: Prevent host from managing timer offsets for protected VMs</title>
<updated>2026-01-15T15:55:50Z</updated>
<author>
<name>Fuad Tabba</name>
</author>
<published>2025-12-11T10:47:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f7d05ee84a6a8d3775e0f0c3070d9380bed844a9'/>
<id>urn:sha1:f7d05ee84a6a8d3775e0f0c3070d9380bed844a9</id>
<content type='text'>
For protected VMs, the guest's timer offset state should not be
controlled by the host and must always run with a virtual counter offset
of 0. The existing timer logic allowed the host to set and manage the
timer counter offsets for protected VMs in certain cases.

Disable all host-side management of timer offsets for protected VMs by
adding checks in the relevant code paths.

Signed-off-by: Fuad Tabba &lt;tabba@google.com&gt;
Link: https://patch.msgid.link/20251211104710.151771-10-tabba@google.com
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux</title>
<updated>2025-12-03T01:03:55Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2025-12-03T01:03:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=44fc84337b6eae580a51cf6f7ca6a22ef1349556'/>
<id>urn:sha1:44fc84337b6eae580a51cf6f7ca6a22ef1349556</id>
<content type='text'>
Pull arm64 updates from Catalin Marinas:
 "These are the arm64 updates for 6.19.

  The biggest part is the Arm MPAM driver under drivers/resctrl/.
  There's a patch touching mm/ to handle spurious faults for huge pmd
  (similar to the pte version). The corresponding arm64 part allows us
  to avoid the TLB maintenance if a (huge) page is reused after a write
  fault. There's EFI refactoring to allow runtime services with
  preemption enabled and the rest is the usual perf/PMU updates and
  several cleanups/typos.

  Summary:

  Core features:

   - Basic Arm MPAM (Memory system resource Partitioning And Monitoring)
     driver under drivers/resctrl/ which makes use of the fs/rectrl/ API

  Perf and PMU:

   - Avoid cycle counter on multi-threaded CPUs

   - Extend CSPMU device probing and add additional filtering support
     for NVIDIA implementations

   - Add support for the PMUs on the NoC S3 interconnect

   - Add additional compatible strings for new Cortex and C1 CPUs

   - Add support for data source filtering to the SPE driver

   - Add support for i.MX8QM and "DB" PMU in the imx PMU driver

  Memory managemennt:

   - Avoid broadcast TLBI if page reused in write fault

   - Elide TLB invalidation if the old PTE was not valid

   - Drop redundant cpu_set_*_tcr_t0sz() macros

   - Propagate pgtable_alloc() errors outside of __create_pgd_mapping()

   - Propagate return value from __change_memory_common()

  ACPI and EFI:

   - Call EFI runtime services without disabling preemption

   - Remove unused ACPI function

  Miscellaneous:

   - ptrace support to disable streaming on SME-only systems

   - Improve sysreg generation to include a 'Prefix' descriptor

   - Replace __ASSEMBLY__ with __ASSEMBLER__

   - Align register dumps in the kselftest zt-test

   - Remove some no longer used macros/functions

   - Various spelling corrections"

* tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (94 commits)
  arm64/mm: Document why linear map split failure upon vm_reset_perms is not problematic
  arm64/pageattr: Propagate return value from __change_memory_common
  arm64/sysreg: Remove unused define ARM64_FEATURE_FIELD_BITS
  KVM: arm64: selftests: Consider all 7 possible levels of cache
  KVM: arm64: selftests: Remove ARM64_FEATURE_FIELD_BITS and its last user
  arm64: atomics: lse: Remove unused parameters from ATOMIC_FETCH_OP_AND macros
  Documentation/arm64: Fix the typo of register names
  ACPI: GTDT: Get rid of acpi_arch_timer_mem_init()
  perf: arm_spe: Add support for filtering on data source
  perf: Add perf_event_attr::config4
  perf/imx_ddr: Add support for PMU in DB (system interconnects)
  perf/imx_ddr: Get and enable optional clks
  perf/imx_ddr: Move ida_alloc() from ddr_perf_init() to ddr_perf_probe()
  dt-bindings: perf: fsl-imx-ddr: Add compatible string for i.MX8QM, i.MX8QXP and i.MX8DXL
  arm64: remove duplicate ARCH_HAS_MEM_ENCRYPT
  arm64: mm: use untagged address to calculate page index
  MAINTAINERS: new entry for MPAM Driver
  arm_mpam: Add kunit tests for props_mismatch()
  arm_mpam: Add kunit test for bitmap reset
  arm_mpam: Add helper to reset saved mbwu state
  ...
</content>
</entry>
<entry>
<title>arm64: Fix typos and spelling errors in comments</title>
<updated>2025-11-12T17:06:21Z</updated>
<author>
<name>mrigendrachaubey</name>
</author>
<published>2025-11-06T13:56:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=96ac403ea2b4ddfc0aa99815476c3ff13a23935e'/>
<id>urn:sha1:96ac403ea2b4ddfc0aa99815476c3ff13a23935e</id>
<content type='text'>
This patch corrects several minor typographical and spelling errors
in comments across multiple arm64 source files.

No functional changes.

Signed-off-by: mrigendrachaubey &lt;mrigendra.chaubey@gmail.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Kill leftovers of ad-hoc timer userspace access</title>
<updated>2025-10-13T13:42:41Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2025-09-29T16:04:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=386aac77da112651a5cdadc4a6b29181592f5aa0'/>
<id>urn:sha1:386aac77da112651a5cdadc4a6b29181592f5aa0</id>
<content type='text'>
Now that the whole timer infrastructure is handled as system register
accesses, get rid of the now unused ad-hoc infrastructure.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Make timer_set_offset() generally accessible</title>
<updated>2025-10-13T13:42:40Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2025-09-29T16:04:48Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a92d552266890f83126fdef4f777a985cc1302bd'/>
<id>urn:sha1:a92d552266890f83126fdef4f777a985cc1302bd</id>
<content type='text'>
Move the timer_set_offset() helper to arm_arch_timer.h, so that it
is next to timer_get_offset(), and accessible by the rest of KVM.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Replace timer context vcpu pointer with timer_id</title>
<updated>2025-10-13T13:42:40Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2025-09-29T16:04:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8625a670afb05f1e1d69d50a74dbcc9d1b855efe'/>
<id>urn:sha1:8625a670afb05f1e1d69d50a74dbcc9d1b855efe</id>
<content type='text'>
Having to follow a pointer to a vcpu is pretty dumb, when the timers
are are a fixed offset in the vcpu structure itself.

Trade the vcpu pointer for a timer_id, which can then be used to
compute the vcpu address as needed.

Reviewed-by: Joey Gouly &lt;joey.gouly@arm.com&gt;
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Introduce timer_context_to_vcpu() helper</title>
<updated>2025-10-13T13:42:40Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2025-09-29T16:04:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=aa68975c973ed3b0bd4ff513113495588afb855c'/>
<id>urn:sha1:aa68975c973ed3b0bd4ff513113495588afb855c</id>
<content type='text'>
We currently have a vcpu pointer nested into each timer context.

As we are about to remove this pointer, introduce a helper (aptly
named timer_context_to_vcpu()) that returns this pointer, at least
until we repaint the data structure.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Add helper to identify a nested context</title>
<updated>2025-07-08T17:40:30Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2025-07-08T17:25:08Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1d6fea7663b2d3fc8569cf14c91a49fb9b37067b'/>
<id>urn:sha1:1d6fea7663b2d3fc8569cf14c91a49fb9b37067b</id>
<content type='text'>
A common idiom in the KVM code is to check if we are currently
dealing with a "nested" context, defined as having NV enabled,
but being in the EL1&amp;0 translation regime.

This is usually expressed as:

	if (vcpu_has_nv(vcpu) &amp;&amp; !is_hyp_ctxt(vcpu) ... )

which is a mouthful and a bit hard to read, specially when followed
by additional conditions.

Introduce a new helper that encapsulate these two terms, allowing
the above to be written as

	if (is_nested_context(vcpu) ... )

which is both shorter and easier to read, and makes more obvious
the potential for simplification on some code paths.

Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
Reviewed-by: Marc Zyngier &lt;maz@kernel.org&gt;
Link: https://lore.kernel.org/r/20250708172532.1699409-4-oliver.upton@linux.dev
Signed-off-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
</content>
</entry>
<entry>
<title>Merge tag 'kvmarm-fixes-6.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD</title>
<updated>2025-06-11T18:25:22Z</updated>
<author>
<name>Paolo Bonzini</name>
</author>
<published>2025-06-11T18:25:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ce360c2bfd219130bf1df4282ccf2e9bdf3a5ed5'/>
<id>urn:sha1:ce360c2bfd219130bf1df4282ccf2e9bdf3a5ed5</id>
<content type='text'>
KVM/arm64 fixes for 6.16, take #2

- Rework of system register accessors for system registers that are
  directly writen to memory, so that sanitisation of the in-memory
  value happens at the correct time (after the read, or before the
  write). For convenience, RMW-style accessors are also provided.

- Multiple fixes for the so-called "arch-timer-edge-cases' selftest,
  which was always broken.
</content>
</entry>
<entry>
<title>KVM: arm64: Don't use __vcpu_sys_reg() to get the address of a sysreg</title>
<updated>2025-06-05T13:18:01Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2025-06-03T07:08:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b61fae4ee120f337b8700dff43b2fd639f3bf6a5'/>
<id>urn:sha1:b61fae4ee120f337b8700dff43b2fd639f3bf6a5</id>
<content type='text'>
We are about to prevent the use of __vcpu_sys_reg() as a lvalue,
and getting the address of a rvalue is not a thing.

Update the couple of places where we do this to use the __ctxt_sys_reg()
accessor, which return the address of a register.

Reviewed-by: Miguel Luis &lt;miguel.luis@oracle.com&gt;
Reviewed-by: Oliver Upton &lt;oliver.upton@linux.dev&gt;
Link: https://lore.kernel.org/r/20250603070824.1192795-4-maz@kernel.org
Signed-off-by: Marc Zyngier &lt;maz@kernel.org&gt;
</content>
</entry>
</feed>
