<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/arm64/kernel/ptrace.c, branch linux-6.0.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.0.y</id>
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<updated>2022-09-08T13:26:59Z</updated>
<entry>
<title>arm64/ptrace: Don't clear calling process' TIF_SME on OOM</title>
<updated>2022-09-08T13:26:59Z</updated>
<author>
<name>Mark Brown</name>
</author>
<published>2022-09-02T13:28:02Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d105d6920ec758125b69c0b097bf498348888a9d'/>
<id>urn:sha1:d105d6920ec758125b69c0b097bf498348888a9d</id>
<content type='text'>
If allocating memory for the target SVE state in za_set() fails we clear
TIF_SME for the ptracing task which is obviously not correct.  If we are
here we know that the target task already had neither TIF_SVE nor
TIF_SME set since we only need to allocate if either the target had not
used either SVE or SME and had no need to allocate state before or we
just changed the vector length with vec_set_vector_length() which clears
TIF_ for us on allocation failure so just remove the clear entirely.

Reported-by: Wang ShaoBo &lt;bobo.shaobowang@huawei.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20220902132802.39682-1-broonie@kernel.org
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64/sme: Don't flush SVE register state when allocating SME storage</title>
<updated>2022-08-23T10:29:11Z</updated>
<author>
<name>Mark Brown</name>
</author>
<published>2022-08-17T18:23:23Z</published>
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<id>urn:sha1:826a4fdd2ada9e5923c58bdd168f31a42e958ffc</id>
<content type='text'>
Currently when taking a SME access trap we allocate storage for the SVE
register state in order to be able to handle storage of streaming mode SVE.
Due to the original usage in a purely SVE context the SVE register state
allocation this also flushes the register state for SVE if storage was
already allocated but in the SME context this is not desirable. For a SME
access trap to be taken the task must not be in streaming mode so either
there already is SVE register state present for regular SVE mode which would
be corrupted or the task does not have TIF_SVE and the flush is redundant.

Fix this by adding a flag to sve_alloc() indicating if we are in a SVE
context and need to flush the state. Freshly allocated storage is always
zeroed either way.

Fixes: 8bd7f91c03d8 ("arm64/sme: Implement traps and syscall handling for SME")
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Reviewed-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Link: https://lore.kernel.org/r/20220817182324.638214-4-broonie@kernel.org
Signed-off-by: Will Deacon &lt;will@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64/sme: Remove _EL0 from name of SVCR - FIXME sysreg.h</title>
<updated>2022-05-16T18:50:20Z</updated>
<author>
<name>Mark Brown</name>
</author>
<published>2022-05-10T16:12:01Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ec0067a63e5a37de74025d46095cfe7a7af3114a'/>
<id>urn:sha1:ec0067a63e5a37de74025d46095cfe7a7af3114a</id>
<content type='text'>
The defines for SVCR call it SVCR_EL0 however the architecture calls the
register SVCR with no _EL0 suffix. In preparation for generating the sysreg
definitions rename to match the architecture, no functional change.

Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20220510161208.631259-6-broonie@kernel.org
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64/sme: More sensibly define the size for the ZA register set</title>
<updated>2022-05-06T17:24:19Z</updated>
<author>
<name>Mark Brown</name>
</author>
<published>2022-05-05T22:15:17Z</published>
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<id>urn:sha1:d158a0608eb85f29f98357b97d01b80250636613</id>
<content type='text'>
Since the vector length configuration mechanism is identical between SVE
and SME we share large elements of the code including the definition for
the maximum vector length. Unfortunately when we were defining the ABI
for SVE we included not only the actual maximum vector length of 2048
bits but also the value possible if all the bits reserved in the
architecture for expansion of the LEN field were used, 16384 bits.

This starts creating problems if we try to allocate anything for the ZA
matrix based on the maximum possible vector length, as we do for the
regset used with ptrace during the process of generating a core dump.
While the maximum potential size for ZA with the current architecture is
a reasonably managable 64K with the higher reserved limit ZA would be
64M which leads to entirely reasonable complaints from the memory
management code when we try to allocate a buffer of that size. Avoid
these issues by defining the actual maximum vector length for the
architecture and using it for the SME regsets.

Also use the full ZA_PT_SIZE() with the header rather than just the
actual register payload when specifying the size, fixing support for the
largest vector lengths now that we have this new, lower define. With the
SVE maximum this did not cause problems due to the extra headroom we
had.

While we're at it add a comment clarifying why even though ZA is a
single register we tell the regset code that it is a multi-register
regset.

Reported-by: Qian Cai &lt;quic_qiancai@quicinc.com&gt;
Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Tested-by: Naresh Kamboju &lt;naresh.kamboju@linaro.org&gt;
Link: https://lore.kernel.org/r/20220505221517.1642014-1-broonie@kernel.org
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64/sme: Add ptrace support for ZA</title>
<updated>2022-04-22T17:51:17Z</updated>
<author>
<name>Mark Brown</name>
</author>
<published>2022-04-19T11:22:29Z</published>
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<id>urn:sha1:776b4a1cf36411e96972455ca72906b722b80ea1</id>
<content type='text'>
The ZA array can be read and written with the NT_ARM_ZA.  Similarly to
our interface for the SVE vector registers the regset consists of a
header with information on the current vector length followed by an
optional register data payload, represented as for signals as a series
of horizontal vectors from 0 to VL/8 in the endianness independent
format used for vectors.

On get if ZA is enabled then register data will be provided, otherwise
it will be omitted.  On set if register data is provided then ZA is
enabled and initialized using the provided data, otherwise it is
disabled.

Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Reviewed-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Link: https://lore.kernel.org/r/20220419112247.711548-22-broonie@kernel.org
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64/sme: Implement ptrace support for streaming mode SVE registers</title>
<updated>2022-04-22T17:51:15Z</updated>
<author>
<name>Mark Brown</name>
</author>
<published>2022-04-19T11:22:28Z</published>
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<id>urn:sha1:e12310a0d30f260b26297bc8d7c95769489af038</id>
<content type='text'>
The streaming mode SVE registers are represented using the same data
structures as for SVE but since the vector lengths supported and in use
may not be the same as SVE we represent them with a new type NT_ARM_SSVE.
Unfortunately we only have a single 16 bit reserved field available in
the header so there is no space to fit the current and maximum vector
length for both standard and streaming SVE mode without redefining the
structure in a way the creates a complicatd and fragile ABI. Since FFR
is not present in streaming mode it is read and written as zero.

Setting NT_ARM_SSVE registers will put the task into streaming mode,
similarly setting NT_ARM_SVE registers will exit it. Reads that do not
correspond to the current mode of the task will return the header with
no register data. For compatibility reasons on write setting no flag for
the register type will be interpreted as setting SVE registers, though
users can provide no register data as an alternative mechanism for doing
so.

Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Reviewed-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Link: https://lore.kernel.org/r/20220419112247.711548-21-broonie@kernel.org
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
<entry>
<title>ptrace: Create ptrace_report_syscall_{entry,exit} in ptrace.h</title>
<updated>2022-03-10T19:35:08Z</updated>
<author>
<name>Eric W. Biederman</name>
</author>
<published>2022-01-27T17:46:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=153474ba1a4aed0a7b797b4c2be8c35c7a4e57bd'/>
<id>urn:sha1:153474ba1a4aed0a7b797b4c2be8c35c7a4e57bd</id>
<content type='text'>
Rename tracehook_report_syscall_{entry,exit} to
ptrace_report_syscall_{entry,exit} and place them in ptrace.h

There is no longer any generic tracehook infractructure so make
these ptrace specific functions ptrace specific.

Reviewed-by: Kees Cook &lt;keescook@chromium.org&gt;
Link: https://lkml.kernel.org/r/20220309162454.123006-3-ebiederm@xmission.com
Signed-off-by: "Eric W. Biederman" &lt;ebiederm@xmission.com&gt;
</content>
</entry>
<entry>
<title>ptrace/arm: Rename tracehook_report_syscall report_syscall</title>
<updated>2022-03-10T19:34:09Z</updated>
<author>
<name>Eric W. Biederman</name>
</author>
<published>2022-01-27T17:27:10Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=42da6b7e7db5316dac541baf4ed8168bc3bb3f74'/>
<id>urn:sha1:42da6b7e7db5316dac541baf4ed8168bc3bb3f74</id>
<content type='text'>
Make the arm and arm64 code more concise and less confusing by
renaming the architecture specific tracehook_report_syscall to
report_syscall.

Reviewed-by: Kees Cook &lt;keescook@chromium.org&gt;
Link: https://lkml.kernel.org/r/20220309162454.123006-2-ebiederm@xmission.com
Signed-off-by: "Eric W. Biederman" &lt;ebiederm@xmission.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'core_entry_for_v5.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2022-01-10T19:34:10Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2022-01-10T19:34:10Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=48a60bdb2be807767eba6878fdf2fe5bea5d8d27'/>
<id>urn:sha1:48a60bdb2be807767eba6878fdf2fe5bea5d8d27</id>
<content type='text'>
Pull thread_info flag accessor helper updates from Borislav Petkov:
 "Add a set of thread_info.flags accessors which snapshot it before
  accesing it in order to prevent any potential data races, and convert
  all users to those new accessors"

* tag 'core_entry_for_v5.17_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  powerpc: Snapshot thread flags
  powerpc: Avoid discarding flags in system_call_exception()
  openrisc: Snapshot thread flags
  microblaze: Snapshot thread flags
  arm64: Snapshot thread flags
  ARM: Snapshot thread flags
  alpha: Snapshot thread flags
  sched: Snapshot thread flags
  entry: Snapshot thread flags
  x86: Snapshot thread flags
  thread_info: Add helpers to snapshot thread flags
</content>
</entry>
<entry>
<title>arm64/sve: Generalise vector length configuration prctl() for SME</title>
<updated>2021-12-14T18:33:44Z</updated>
<author>
<name>Mark Brown</name>
</author>
<published>2021-12-10T18:40:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=30c43e73b3fa2d75f5d4e72fea345380ba5eb21b'/>
<id>urn:sha1:30c43e73b3fa2d75f5d4e72fea345380ba5eb21b</id>
<content type='text'>
In preparation for adding SME support update the bulk of the implementation
for the vector length configuration prctl() calls to be independent of
vector type.

Signed-off-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20211210184133.320748-3-broonie@kernel.org
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
</content>
</entry>
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