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<title>kernel.git/arch/arm64/kernel/perf_event.c, branch linux-4.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.9.y</id>
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<updated>2021-06-30T12:49:19Z</updated>
<entry>
<title>arm64: perf: Disable PMU while processing counter overflows</title>
<updated>2021-06-30T12:49:19Z</updated>
<author>
<name>Suzuki K Poulose</name>
</author>
<published>2018-07-10T08:58:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=36cee5f5a3a552791d47744a81008381917d915c'/>
<id>urn:sha1:36cee5f5a3a552791d47744a81008381917d915c</id>
<content type='text'>
commit 3cce50dfec4a5b0414c974190940f47dd32c6dee upstream.

The arm64 PMU updates the event counters and reprograms the
counters in the overflow IRQ handler without disabling the
PMU. This could potentially cause skews in for group counters,
where the overflowed counters may potentially loose some event
counts, while they are reprogrammed. To prevent this, disable
the PMU while we process the counter overflows and enable it
right back when we are done.

This patch also moves the PMU stop/start routines to avoid a
forward declaration.

Suggested-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Suzuki K Poulose &lt;suzuki.poulose@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Aman Priyadarshi &lt;apeureka@amazon.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>arm64: perf: set suppress_bind_attrs flag to true</title>
<updated>2019-01-26T08:38:33Z</updated>
<author>
<name>Anders Roxell</name>
</author>
<published>2018-10-17T15:26:22Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bd37f21e9f85e598be452b4817292bbe601efcd0'/>
<id>urn:sha1:bd37f21e9f85e598be452b4817292bbe601efcd0</id>
<content type='text'>
[ Upstream commit 81e9fa8bab381f8b6eb04df7cdf0f71994099bd4 ]

The armv8_pmuv3 driver doesn't have a remove function, and when the test
'CONFIG_DEBUG_TEST_DRIVER_REMOVE=y' is enabled, the following Call trace
can be seen.

[    1.424287] Failed to register pmu: armv8_pmuv3, reason -17
[    1.424870] WARNING: CPU: 0 PID: 1 at ../kernel/events/core.c:11771 perf_event_sysfs_init+0x98/0xdc
[    1.425220] Modules linked in:
[    1.425531] CPU: 0 PID: 1 Comm: swapper/0 Tainted: G        W         4.19.0-rc7-next-20181012-00003-ge7a97b1ad77b-dirty #35
[    1.425951] Hardware name: linux,dummy-virt (DT)
[    1.426212] pstate: 80000005 (Nzcv daif -PAN -UAO)
[    1.426458] pc : perf_event_sysfs_init+0x98/0xdc
[    1.426720] lr : perf_event_sysfs_init+0x98/0xdc
[    1.426908] sp : ffff00000804bd50
[    1.427077] x29: ffff00000804bd50 x28: ffff00000934e078
[    1.427429] x27: ffff000009546000 x26: 0000000000000007
[    1.427757] x25: ffff000009280710 x24: 00000000ffffffef
[    1.428086] x23: ffff000009408000 x22: 0000000000000000
[    1.428415] x21: ffff000009136008 x20: ffff000009408730
[    1.428744] x19: ffff80007b20b400 x18: 000000000000000a
[    1.429075] x17: 0000000000000000 x16: 0000000000000000
[    1.429418] x15: 0000000000000400 x14: 2e79726f74636572
[    1.429748] x13: 696420656d617320 x12: 656874206e692065
[    1.430060] x11: 6d616e20656d6173 x10: 2065687420687469
[    1.430335] x9 : ffff00000804bd50 x8 : 206e6f7361657220
[    1.430610] x7 : 2c3376756d705f38 x6 : ffff00000954d7ce
[    1.430880] x5 : 0000000000000000 x4 : 0000000000000000
[    1.431226] x3 : 0000000000000000 x2 : ffffffffffffffff
[    1.431554] x1 : 4d151327adc50b00 x0 : 0000000000000000
[    1.431868] Call trace:
[    1.432102]  perf_event_sysfs_init+0x98/0xdc
[    1.432382]  do_one_initcall+0x6c/0x1a8
[    1.432637]  kernel_init_freeable+0x1bc/0x280
[    1.432905]  kernel_init+0x18/0x160
[    1.433115]  ret_from_fork+0x10/0x18
[    1.433297] ---[ end trace 27fd415390eb9883 ]---

Rework to set suppress_bind_attrs flag to avoid removing the device when
CONFIG_DEBUG_TEST_DRIVER_REMOVE=y, since there's no real reason to
remove the armv8_pmuv3 driver.

Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Co-developed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Anders Roxell &lt;anders.roxell@linaro.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>arm64: perf: Ignore exclude_hv when kernel is running in HYP</title>
<updated>2018-04-13T17:47:57Z</updated>
<author>
<name>Ganapatrao Kulkarni</name>
</author>
<published>2017-05-02T16:29:34Z</published>
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<id>urn:sha1:bffb84bf5a63288a65cbdbd0be860b780322f857</id>
<content type='text'>
[ Upstream commit 78a19cfdf37d19002c83c8790853c1cc10feccdc ]

commit d98ecdaca296 ("arm64: perf: Count EL2 events if the kernel is
running in HYP") returns -EINVAL when perf system call perf_event_open is
called with exclude_hv != exclude_kernel. This change breaks applications
on VHE enabled ARMv8.1 platforms. The issue was observed with HHVM
application, which calls perf_event_open with exclude_hv = 1 and
exclude_kernel = 0.

There is no separate hypervisor privilege level when VHE is enabled, the
host kernel runs at EL2. So when VHE is enabled, we should ignore
exclude_hv from the application. This behaviour is consistent with PowerPC
where the exclude_hv is ignored when the hypervisor is not present and with
x86 where this flag is ignored.

Signed-off-by: Ganapatrao Kulkarni &lt;ganapatrao.kulkarni@cavium.com&gt;
[will: added comment to justify the behaviour of exclude_hv]
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm64: Fix the issues when guest PMCCFILTR is configured</title>
<updated>2016-11-18T09:06:58Z</updated>
<author>
<name>Wei Huang</name>
</author>
<published>2016-11-16T17:09:20Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b112c84a6ff035271d41d548c10215f18443d6a6'/>
<id>urn:sha1:b112c84a6ff035271d41d548c10215f18443d6a6</id>
<content type='text'>
KVM calls kvm_pmu_set_counter_event_type() when PMCCFILTR is configured.
But this function can't deals with PMCCFILTR correctly because the evtCount
bits of PMCCFILTR, which is reserved 0, conflits with the SW_INCR event
type of other PMXEVTYPER&lt;n&gt; registers. To fix it, when eventsel == 0, this
function shouldn't return immediately; instead it needs to check further
if select_idx is ARMV8_PMU_CYCLE_IDX.

Another issue is that KVM shouldn't copy the eventsel bits of PMCCFILTER
blindly to attr.config. Instead it ought to convert the request to the
"cpu cycle" event type (i.e. 0x11).

To support this patch and to prevent duplicated definitions, a limited
set of ARMv8 perf event types were relocated from perf_event.c to
asm/perf_event.h.

Cc: stable@vger.kernel.org # 4.6+
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Wei Huang &lt;wei@redhat.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: pmu: Hoist pmu platform device name</title>
<updated>2016-09-16T16:11:34Z</updated>
<author>
<name>Jeremy Linton</name>
</author>
<published>2016-09-14T22:32:31Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=85023b2e1325826edf5d226a9cb4d809ed1e2024'/>
<id>urn:sha1:85023b2e1325826edf5d226a9cb4d809ed1e2024</id>
<content type='text'>
Move the PMU name into a common header file so it may
be referenced by other users.

Signed-off-by: Jeremy Linton &lt;jeremy.linton@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: pmu: Probe default hw/cache counters</title>
<updated>2016-09-16T16:11:33Z</updated>
<author>
<name>Jeremy Linton</name>
</author>
<published>2016-09-14T22:32:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=236b9b91cd1255a9cae9d7ef6b755efe37013c1f'/>
<id>urn:sha1:236b9b91cd1255a9cae9d7ef6b755efe37013c1f</id>
<content type='text'>
ARMv8 machines can identify the micro/arch defined counters
that are available on a machine. Add all these counters to the
default armv8 perf map. At run-time disable the counters which
are not available on the given PMU.

Signed-off-by: Jeremy Linton &lt;jeremy.linton@arm.com&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: pmu: add fallback probe table</title>
<updated>2016-09-16T16:11:33Z</updated>
<author>
<name>Mark Salter</name>
</author>
<published>2016-09-14T22:32:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=dbee3a74ef2c73acc4eb31cee7a60d5e46767a41'/>
<id>urn:sha1:dbee3a74ef2c73acc4eb31cee7a60d5e46767a41</id>
<content type='text'>
In preparation for ACPI support, add a pmu_probe_info table to
the arm_pmu_device_probe() call. This table gets used when
probing in the absence of a devicetree node for PMU.

Signed-off-by: Mark Salter &lt;msalter@redhat.com&gt;
Signed-off-by: Jeremy Linton &lt;jeremy.linton@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: perf: move to common attr_group fields</title>
<updated>2016-09-09T13:51:51Z</updated>
<author>
<name>Mark Rutland</name>
</author>
<published>2016-09-09T13:08:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=569de9026c2904dab9b335437fe48e318e824c96'/>
<id>urn:sha1:569de9026c2904dab9b335437fe48e318e824c96</id>
<content type='text'>
By using a common attr_groups array, the common arm_pmu code can set up
common files (e.g. cpumask) for us in subsequent patches.

Signed-off-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: perf: Use the builtin_platform_driver</title>
<updated>2016-08-22T09:00:48Z</updated>
<author>
<name>Kefeng Wang</name>
</author>
<published>2016-08-10T12:59:15Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=826d05623f3e2b316bbad6204418a0ff1b49a720'/>
<id>urn:sha1:826d05623f3e2b316bbad6204418a0ff1b49a720</id>
<content type='text'>
Use the builtin_platform_driver() to simplify code.

Signed-off-by: Kefeng Wang &lt;wangkefeng.wang@huawei.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>arm64: perf: don't expose CHAIN event in sysfs</title>
<updated>2016-04-25T14:05:24Z</updated>
<author>
<name>Will Deacon</name>
</author>
<published>2016-04-25T14:05:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4ba2578fa7b557012b8f59ad7a9284ff15394338'/>
<id>urn:sha1:4ba2578fa7b557012b8f59ad7a9284ff15394338</id>
<content type='text'>
The CHAIN event allows two 32-bit counters to be treated as a single
64-bit counter, under certain allocation restrictions on the PMU.

Whilst userspace could theoretically create CHAIN events using the raw
event syntax, we don't really want to advertise this in sysfs, since
it's useless in isolation. This patch removes the event from our /sys
entries.

Reported-by: Mark Rutland &lt;mark.rutland@arm.com&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
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