kernel.git/arch/arm64/kernel/perf_event.c, branch linux-4.7.y

arm64: perf: don't expose CHAIN event in sysfs

2016-04-25T14:05:24Z

The CHAIN event allows two 32-bit counters to be treated as a single 64-bit counter, under certain allocation restrictions on the PMU. Whilst userspace could theoretically create CHAIN events using the raw event syntax, we don't really want to advertise this in sysfs, since it's useless in isolation. This patch removes the event from our /sys entries. Reported-by: Mark Rutland Signed-off-by: Will Deacon

arm64/perf: Add Broadcom Vulcan PMU support

2016-04-25T13:11:30Z

Broadcom Vulcan uses ARMv8 PMUv3 and supports most of the ARMv8 recommended implementation defined events. Added Vulcan events mapping for perf and perf_cache map. Acked-by: Mark Rutland Signed-off-by: Ashok Kumar Signed-off-by: Will Deacon

arm64/perf: Filter common events based on PMCEIDn_EL0

2016-04-25T13:11:10Z

The complete common architectural and micro-architectural event number structure is filtered based on PMCEIDn_EL0 and exposed to /sys using is_visibile function pointer in events attribute_group. To filter the events in is_visible function, pmceid based bitmap is stored in arm_pmu structure and the id field from perf_pmu_events_attr is used to check against the bitmap. The function which derives event bitmap from PMCEIDn_EL0 is executed in the cpus, which has the pmu being initialized, for heterogeneous pmu support. Acked-by: Mark Rutland Signed-off-by: Ashok Kumar Signed-off-by: Will Deacon

arm64/perf: Access pmu register using _sys_reg

2016-04-25T13:11:06Z

changed pmu register access to make use of _sys_reg from sysreg.h instead of accessing them directly. Signed-off-by: Ashok Kumar Reviewed-by: Mark Rutland Signed-off-by: Will Deacon

arm64/perf: Define complete ARMv8 recommended implementation defined events

2016-04-25T13:11:06Z

Defined all the ARMv8 recommended implementation defined events from J3 - "ARM recommendations for IMPLEMENTATION DEFINED event numbers" in ARM DDI 0487A.g. Signed-off-by: Ashok Kumar Reviewed-by: Mark Rutland Signed-off-by: Will Deacon

arm64/perf: Changed events naming as per the ARM ARM

2016-04-25T13:11:06Z

changed all the common events name definition as per the document ARM DDI 0487A.g SoC specific event names follow the general naming style in the file and doesn't reflect any document. changed ARMV8_A53_PERFCTR_PREFETCH_LINEFILL to ARMV8_A53_PERFCTR_PREF_LINEFILL to match with other SoC specific event names which use _PREF_ style. corrected typo l21 to l2i. Signed-off-by: Ashok Kumar Reviewed-by: Mark Rutland Signed-off-by: Will Deacon

arm64: perf: Move PMU register related defines to asm/perf_event.h

2016-03-29T15:04:57Z

To use the ARMv8 PMU related register defines from the KVM code, we move the relevant definitions to asm/perf_event.h header file and rename them with prefix ARMV8_PMU_. This allows us to get rid of kvm_perf_event.h. Signed-off-by: Anup Patel Signed-off-by: Shannon Zhao Acked-by: Marc Zyngier Reviewed-by: Andrew Jones Signed-off-by: Marc Zyngier Signed-off-by: Will Deacon

Merge tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

2016-03-21T20:14:16Z

Pull arm[64] perf updates from Will Deacon: "I have another mixed bag of ARM-related perf patches here. It's about 25% CPU and 75% interconnect, but with drivers/bus/ languishing without an obvious maintainer or tree, Olof and I agreed to keep all of these PMU patches together. I suspect a whole load of code from drivers/bus/arm-* can be moved under drivers/perf/, so that's on the radar for the future. Summary: - Initial support for ARMv8.1 CPU PMUs - Support for the CPU PMU in Cavium ThunderX - CPU PMU support for systems running 32-bit Linux in secure mode - Support for the system PMU in ARM CCI-550 (Cache Coherent Interconnect)" * tag 'arm64-perf' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (26 commits) drivers/perf: arm_pmu: avoid NULL dereference when not using devicetree arm64: perf: Extend ARMV8_EVTYPE_MASK to include PMCR.LC arm-cci: remove unused variable arm-cci: don't return value from void function arm-cci: make private functions static arm-cci: CoreLink CCI-550 PMU driver arm-cci500: Rearrange PMU driver for code sharing with CCI-550 PMU arm-cci: CCI-500: Work around PMU counter writes arm-cci: Provide hook for writing to PMU counters arm-cci: Add helper to enable PMU without synchornising counters arm-cci: Add routines to save/restore all counters arm-cci: Get the status of a counter arm-cci: write_counter: Remove redundant check arm-cci: Delay PMU counter writes to pmu::pmu_enable arm-cci: Refactor CCI PMU enable/disable methods arm-cci: Group writes to counter arm-cci: fix handling cpumask_any_but return value arm-cci: simplify sysfs attr handling drivers/perf: arm_pmu: implement CPU_PM notifier arm64: dts: Add Cavium ThunderX specific PMU ...

arm64: perf: Extend ARMV8_EVTYPE_MASK to include PMCR.LC

2016-02-29T23:23:59Z

Commit 7175f0591eb9 ("arm64: perf: Enable PMCR long cycle counter bit") added initial support for a 64-bit cycle counter enabled using PMCR.LC. Unfortunately, that patch doesn't extend ARMV8_EVTYPE_MASK, so any attempts to set the enable bit are ignored by armv8pmu_pmcr_write. This patch extends the mask to include the new bit. Signed-off-by: Will Deacon

arm64: perf: Count EL2 events if the kernel is running in HYP

2016-02-29T18:34:18Z

When the kernel is running in HYP (with VHE), it is necessary to include EL2 events if the user requests counting kernel or hypervisor events. Reviewed-by: Christoffer Dall Acked-by: Catalin Marinas Acked-by: Will Deacon Signed-off-by: Marc Zyngier