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<title>kernel.git/arch/arm64/kernel/pci.c, branch linux-4.10.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.10.y</id>
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<updated>2016-12-06T19:45:48Z</updated>
<entry>
<title>PCI/ACPI: Extend pci_mcfg_lookup() to return ECAM config accessors</title>
<updated>2016-12-06T19:45:48Z</updated>
<author>
<name>Tomasz Nowicki</name>
</author>
<published>2016-09-09T19:24:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=13983eb89d5afaa65acd4479fad151cbd4de5509'/>
<id>urn:sha1:13983eb89d5afaa65acd4479fad151cbd4de5509</id>
<content type='text'>
pci_mcfg_lookup() is the external interface to the generic MCFG code.
Previously it merely looked up the ECAM base address for a given domain and
bus range.  We want a way to add MCFG quirks, some of which may require
special config accessors and adjustments to the ECAM address range.

Extend pci_mcfg_lookup() so it can return a pointer to a pci_ecam_ops
structure and a struct resource for the ECAM address space.  For now, it
always returns &amp;pci_generic_ecam_ops (the standard accessor) and the
resource described by the MCFG.

No functional changes intended.

[bhelgaas: changelog]
Signed-off-by: Tomasz Nowicki &lt;tn@semihalf.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
</entry>
<entry>
<title>arm64: PCI: Exclude ACPI "consumer" resources from host bridge windows</title>
<updated>2016-12-06T19:45:48Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2016-12-02T23:25:54Z</published>
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<id>urn:sha1:8fd4391ee717569d60fa283da778f7497630c9b7</id>
<content type='text'>
On x86 and ia64, we have treated all ACPI _CRS resources of PNP0A03 host
bridge devices as "producers", i.e., as host bridge windows.  That's partly
because some x86 BIOSes improperly used "consumer" descriptors to describe
windows and partly because Linux didn't have good support for handling
consumer and producer descriptors differently.

One result is that x86 BIOSes describe host bridge "consumer" resources in
the _CRS of a PNP0C02 device, not the PNP0A03 device itself.  On arm64 we
don't have a legacy of firmware that has this consumer/producer confusion,
so we can handle PNP0A03 "consumer" descriptors as host bridge registers
instead of windows.

Exclude non-window ("consumer") resources from the list of host bridge
windows.  This allows the use of "consumer" PNP0A03 descriptors for bridge
register space.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
</entry>
<entry>
<title>arm64: PCI: Manage controller-specific data on per-controller basis</title>
<updated>2016-12-06T19:45:48Z</updated>
<author>
<name>Tomasz Nowicki</name>
</author>
<published>2016-11-24T11:05:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=093d24a204425f71f4f106b7e62c8df4b456e1cc'/>
<id>urn:sha1:093d24a204425f71f4f106b7e62c8df4b456e1cc</id>
<content type='text'>
Currently we use one shared global acpi_pci_root_ops structure to keep
controller-specific ops. We pass its pointer to acpi_pci_root_create() and
associate it with a host bridge instance for good.  Such a design implies
serious drawback. Any potential manipulation on the single system-wide
acpi_pci_root_ops leads to kernel crash. The structure content is not
really changing even across multiple host bridges creation; thus it was not
an issue so far.

In preparation for adding ECAM quirks mechanism (where controller-specific
PCI ops may be different for each host bridge) allocate new
acpi_pci_root_ops and fill in with data for each bridge. Now it is safe to
have different controller-specific info. As a consequence free
acpi_pci_root_ops when host bridge is released.

No functional changes in this patch.

Signed-off-by: Tomasz Nowicki &lt;tn@semihalf.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</content>
</entry>
<entry>
<title>arm64: PCI: Search ACPI namespace to ensure ECAM space is reserved</title>
<updated>2016-12-06T19:45:48Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2016-11-30T20:48:33Z</published>
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<id>urn:sha1:08b1c19606b5fc7f895dae4d43d507b4da4a83bf</id>
<content type='text'>
The static MCFG table tells us the base of ECAM space, but it does not
reserve the space -- the reservation should be done via a device in the
ACPI namespace whose _CRS includes the ECAM region.

Use acpi_resource_consumer() to check whether the ECAM space is reserved by
an ACPI namespace device.  If it is, emit a message showing which device
reserves it.  If not, emit a "[Firmware Bug]" warning.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</content>
</entry>
<entry>
<title>arm64: PCI: Add local struct device pointers</title>
<updated>2016-12-06T19:45:48Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2016-12-01T17:33:57Z</published>
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<id>urn:sha1:dfd1972c2b464c10fb585c4c60b594e09d181a01</id>
<content type='text'>
Use a local "struct device *dev" for brevity.  No functional change
intended.

Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</content>
</entry>
<entry>
<title>Merge branch 'pci/resource' into next</title>
<updated>2016-08-01T17:23:44Z</updated>
<author>
<name>Bjorn Helgaas</name>
</author>
<published>2016-08-01T17:23:44Z</published>
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<id>urn:sha1:3efc7023787f8a6ddc50fa96707614677a568466</id>
<content type='text'>
* pci/resource:
  unicore32/PCI: Remove pci=firmware command line parameter handling
  ARM/PCI: Remove arch-specific pcibios_enable_device()
  ARM64/PCI: Remove arch-specific pcibios_enable_device()
  MIPS/PCI: Claim bus resources on PCI_PROBE_ONLY set-ups
  ARM/PCI: Claim bus resources on PCI_PROBE_ONLY set-ups
  PCI: generic: Claim bus resources on PCI_PROBE_ONLY set-ups
  PCI: Add generic pci_bus_claim_resources()
  alx: Use pci_(request|release)_mem_regions
  ethernet/intel: Use pci_(request|release)_mem_regions
  GenWQE: Use pci_(request|release)_mem_regions
  lpfc: Use pci_(request|release)_mem_regions
  NVMe: Use pci_(request|release)_mem_regions
  PCI: Add helpers to request/release memory and I/O regions
  PCI: Extending pci=resource_alignment to specify device/vendor IDs
  sparc/PCI: Implement pci_resource_to_user() with pcibios_resource_to_bus()
  powerpc/pci: Implement pci_resource_to_user() with pcibios_resource_to_bus()
  microblaze/PCI: Implement pci_resource_to_user() with pcibios_resource_to_bus()
  PCI: Unify pci_resource_to_user() declarations
  microblaze/PCI: Remove useless __pci_mmap_set_pgprot()
  powerpc/pci: Remove __pci_mmap_set_pgprot()
  PCI: Ignore write combining when mapping I/O port space
</content>
</entry>
<entry>
<title>ARM64/PCI: Remove arch-specific pcibios_enable_device()</title>
<updated>2016-06-23T22:15:30Z</updated>
<author>
<name>Lorenzo Pieralisi</name>
</author>
<published>2016-06-08T11:04:49Z</published>
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<id>urn:sha1:f615bca4ccb9a91b33f0d378503b070fad97e181</id>
<content type='text'>
On systems with PCI_PROBE_ONLY set, we rely on BAR assignments from
firmware.  Previously we did not insert those resources into the resource
tree, so we had to skip pci_enable_resources() because it fails if
resources are not in the resource tree.

Now that we *do* insert resources even when PCI_PROBE_ONLY is set, we no
longer need the ARM64-specific pcibios_enable_device().  Remove it so we
use the generic version.

[bhelgaas: changelog]
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
CC: Arnd Bergmann &lt;arnd@arndb.de&gt;
CC: Catalin Marinas &lt;catalin.marinas@arm.com&gt;</content>
</entry>
<entry>
<title>ARM64: PCI: Support ACPI-based PCI host controller</title>
<updated>2016-06-10T23:37:25Z</updated>
<author>
<name>Tomasz Nowicki</name>
</author>
<published>2016-06-10T19:55:19Z</published>
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<id>urn:sha1:0cb0786bac159ee4c983abab51093ef623849afa</id>
<content type='text'>
Implement pci_acpi_scan_root() and other arch-specific calls so ARM64 can
use ACPI to setup and enumerate PCI buses.

Use memory-mapped configuration space information from either the ACPI
_CBA method or the MCFG table and the ECAM library and generic ECAM config
accessor ops.

Implement acpi_pci_bus_find_domain_nr() to retrieve the domain number from
the acpi_pci_root structure.

Implement pcibios_add_bus() and pcibios_remove_bus() to call
acpi_pci_add_bus() and acpi_pci_remove_bus() for ACPI slot management and
other configuration.

Signed-off-by: Tomasz Nowicki &lt;tn@semihalf.com&gt;
Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</content>
</entry>
<entry>
<title>ARM64: PCI: Implement AML accessors for PCI_Config region</title>
<updated>2016-06-10T23:36:19Z</updated>
<author>
<name>Tomasz Nowicki</name>
</author>
<published>2016-06-10T19:55:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f058f4fbd64028c9e9d433472cf6bcff8efdce7c'/>
<id>urn:sha1:f058f4fbd64028c9e9d433472cf6bcff8efdce7c</id>
<content type='text'>
On ACPI systems, the PCI_Config OperationRegion allows AML to access PCI
configuration space.  The ACPI CA AML interpreter uses performs config
space accesses with acpi_os_read_pci_configuration() and
acpi_os_write_pci_configuration(), which are OS-dependent functions
supplied by acpi/osl.c.

Implement the arch-specific raw_pci_read() and raw_pci_write() interfaces
used by acpi/osl.c for PCI_Config accesses.

N.B. PCI_Config accesses are not supported before PCI bus enumeration.

[bhelgaas: changelog]
Signed-off-by: Tomasz Nowicki &lt;tn@semihalf.com&gt;
Signed-off-by: Jayachandran C &lt;jchandra@broadcom.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</content>
</entry>
<entry>
<title>ARM64: PCI: ACPI support for legacy IRQs parsing and consolidation with DT code</title>
<updated>2016-06-10T23:29:46Z</updated>
<author>
<name>Tomasz Nowicki</name>
</author>
<published>2016-06-10T19:55:17Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d8ed75d593321c80ccd92f9dba218e90286bde16'/>
<id>urn:sha1:d8ed75d593321c80ccd92f9dba218e90286bde16</id>
<content type='text'>
To enable PCI legacy IRQs on platforms booting with ACPI, arch code should
include ACPI-specific callbacks that parse and set-up the device IRQ
number, equivalent to the DT boot path. Owing to the current ACPI core scan
handlers implementation, ACPI PCI legacy IRQs bindings cannot be parsed at
device add time, since that would trigger ACPI scan handlers ordering
issues depending on how the ACPI tables are defined.

To solve this problem and consolidate FW PCI legacy IRQs parsing in one
single pcibios callback (pending final removal), this patch moves DT PCI
IRQ parsing to the pcibios_alloc_irq() callback (called by PCI core code at
driver probe time) and adds ACPI PCI legacy IRQs parsing to the same
callback too, so that FW PCI legacy IRQs parsing is confined in one single
arch callback that can be easily removed when code parsing PCI legacy IRQs
is consolidated and moved to core PCI code.

Suggested-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Tomasz Nowicki &lt;tn@semihalf.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;</content>
</entry>
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