kernel.git/arch/arm64/kernel/cpu_errata.c, branch linux-5.7.y

arm64: Add missing sentinel to erratum_1463225

2020-07-22T07:34:04Z

[ Upstream commit 09c717c92b52df54918e12cbfe6a4658233fda69 ] When the erratum_1463225 array was introduced a sentinel at the end was missing thus causing a KASAN: global-out-of-bounds in is_affected_midr_range_list on arm64 error. Fixes: a9e821b89daa ("arm64: Add KRYO4XX gold CPU cores to erratum list 1463225 and 1418040") Signed-off-by: Florian Fainelli Reviewed-by: Sai Prakash Ranjan Link: https://lore.kernel.org/linux-arm-kernel/CA+G9fYs3EavpU89-rTQfqQ9GgxAMgMAk7jiiVrfP0yxj5s+Q6g@mail.gmail.com/ Link: https://lore.kernel.org/r/20200709051345.14544-1-f.fainelli@gmail.com Signed-off-by: Will Deacon Signed-off-by: Sasha Levin

arm64: Add KRYO4XX silver CPU cores to erratum list 1530923 and 1024718

2020-07-22T07:34:02Z

[ Upstream commit 9b23d95c539ebc5d6d6b5d6f20d2d7922384e76e ] KRYO4XX silver/LITTLE CPU cores with revision r1p0 are affected by erratum 1530923 and 1024718, so add them to the respective list. The variant and revision bits are implementation defined and are different from the their Cortex CPU counterparts on which they are based on, i.e., r1p0 is equivalent to rdpe. Signed-off-by: Sai Prakash Ranjan Link: https://lore.kernel.org/r/7013e8a3f857ca7e82863cc9e34a614293d7f80c.1593539394.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Will Deacon Signed-off-by: Sasha Levin

arm64: Add KRYO4XX gold CPU cores to erratum list 1463225 and 1418040

2020-07-22T07:34:02Z

[ Upstream commit a9e821b89daa55cc940c546b124101939d3f0451 ] KRYO4XX gold/big CPU core revisions r0p0 to r3p1 are affected by erratum 1463225 and 1418040, so add them to the respective list. The variant and revision bits are implementation defined and are different from the their Cortex CPU counterparts on which they are based on, i.e., (r0p0 to r3p1) is equivalent to (rcpe to rfpf). Signed-off-by: Sai Prakash Ranjan Link: https://lore.kernel.org/r/83780e80c6377c12ca51b5d53186b61241685e49.1593539394.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Will Deacon Signed-off-by: Sasha Levin

arm64: Add KRYO{3,4}XX silver CPU cores to SSB safelist

2020-07-16T06:13:16Z

[ Upstream commit 108447fd0d1a34b0929cd26dc637c917a734ebab ] QCOM KRYO{3,4}XX silver/LITTLE CPU cores are based on Cortex-A55 and are SSB safe, hence add them to SSB safelist -> arm64_ssb_cpus[]. Reported-by: Stephen Boyd Signed-off-by: Sai Prakash Ranjan Reviewed-by: Douglas Anderson Link: https://lore.kernel.org/r/20200625103123.7240-1-saiprakash.ranjan@codeaurora.org Signed-off-by: Will Deacon Signed-off-by: Sasha Levin

arm64: Mark call_smc_arch_workaround_1 as __maybe_unused

2020-03-11T12:01:59Z

When building allnoconfig: arch/arm64/kernel/cpu_errata.c:174:13: warning: unused function 'call_smc_arch_workaround_1' [-Wunused-function] static void call_smc_arch_workaround_1(void) ^ 1 warning generated. Follow arch/arm and mark this function as __maybe_unused. Fixes: 4db61fef16a1 ("arm64: kvm: Modernize __smccc_workaround_1_smc_start annotations") Signed-off-by: Nathan Chancellor Signed-off-by: Catalin Marinas

arm64: kvm: Modernize __smccc_workaround_1_smc_start annotations

2020-03-09T17:35:43Z

In an effort to clarify and simplify the annotation of assembly functions in the kernel new macros have been introduced. These replace ENTRY and ENDPROC with separate annotations for standard C callable functions, data and code with different calling conventions. Using these for __smccc_workaround_1_smc is more involved than for most symbols as this symbol is annotated quite unusually, rather than just have the explicit symbol we define _start and _end symbols which we then use to compute the length. This does not play at all nicely with the new style macros. Instead define a constant for the size of the function and use that in both the C code and for .org based size checks in the assembly code. Signed-off-by: Mark Brown Signed-off-by: Catalin Marinas Acked-by: Marc Zyngier

arm64: kvm: Modernize annotation for __bp_harden_hyp_vecs

2020-03-09T17:35:35Z

We have recently introduced new macros for annotating assembly symbols for things that aren't C functions, SYM_CODE_START() and SYM_CODE_END(), in an effort to clarify and simplify our annotations of assembly files. Using these for __bp_harden_hyp_vecs is more involved than for most symbols as this symbol is annotated quite unusually as rather than just have the explicit symbol we define _start and _end symbols which we then use to compute the length. This does not play at all nicely with the new style macros. Since the size of the vectors is a known constant which won't vary the simplest thing to do is simply to drop the separate _start and _end symbols and just use a #define for the size. Signed-off-by: Mark Brown Signed-off-by: Catalin Marinas Acked-by: Marc Zyngier

Merge branch 'for-next/errata' into for-next/core

2020-01-22T11:35:05Z

* for-next/errata: (3 commits) arm64: Workaround for Cortex-A55 erratum 1530923 ...

arm64: Add KRYO{3,4}XX CPU cores to spectre-v2 safe list

2020-01-17T12:46:41Z

The "silver" KRYO3XX and KRYO4XX CPU cores are not affected by Spectre variant 2. Add them to spectre_v2 safe list to correct the spurious ARM_SMCCC_ARCH_WORKAROUND_1 warning and vulnerability status reported under sysfs. Reviewed-by: Stephen Boyd Tested-by: Stephen Boyd Signed-off-by: Sai Prakash Ranjan [will: tweaked commit message to remove stale mention of "gold" cores] Signed-off-by: Will Deacon

arm64: Workaround for Cortex-A55 erratum 1530923

2020-01-16T10:44:14Z

Cortex-A55 erratum 1530923 allows TLB entries to be allocated as a result of a speculative AT instruction. This may happen in the middle of a guest world switch while the relevant VMSA configuration is in an inconsistent state, leading to erroneous content being allocated into TLBs. The same workaround as is used for Cortex-A76 erratum 1165522 (WORKAROUND_SPECULATIVE_AT_VHE) can be used here. Note that this mandates the use of VHE on affected parts. Acked-by: Marc Zyngier Signed-off-by: Steven Price Signed-off-by: Will Deacon