Hosts the 0x221E linux distro kernel. https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.11.y 2017-07-21T05:00:12Z 2017-07-21T05:00:12Z Marc Zyngier 2017-06-21T21:45:08Z urn:sha1:618986c4bcda58a6ec5fc3244f061a756d549548 commit 88cda00733f0731711c76e535d4972c296ac512e upstream. Contrary to popular belief, PPIs connected to a GICv3 to not have an affinity field similar to that of GICv2. That is consistent with the fact that GICv3 is designed to accomodate thousands of CPUs, and fitting them as a bitmap in a byte is... difficult. Fixes: adbc3695d9e4 ("arm64: dts: add the Marvell Armada 3700 family and a development board") Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2017-05-25T13:46:24Z Daniel Lezcano 2017-03-16T14:03:24Z urn:sha1:ee6dfbff78289b671c9dce9c141d68d86fd617fe commit 0fbdf9953b41c28845fe8d05007ff09634ee3000 upstream. The MMC hosts could be left in an unconsistent or uninitialized state from the firmware. Instead of assuming, the firmware did the right things, let's reset the host controllers. This change fixes a bug when the mmc2/sdio is initialized leading to a hung task: [ 242.704294] INFO: task kworker/7:1:675 blocked for more than 120 seconds. [ 242.711129] Not tainted 4.9.0-rc8-00017-gcf0251f #3 [ 242.716571] "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message. [ 242.724435] kworker/7:1 D 0 675 2 0x00000000 [ 242.729973] Workqueue: events_freezable mmc_rescan [ 242.734796] Call trace: [ 242.737269] [<ffff00000808611c>] __switch_to+0xa8/0xb4 [ 242.742437] [<ffff000008d07c04>] __schedule+0x1c0/0x67c [ 242.747689] [<ffff000008d08254>] schedule+0x40/0xa0 [ 242.752594] [<ffff000008d0b284>] schedule_timeout+0x1c4/0x35c [ 242.758366] [<ffff000008d08e38>] wait_for_common+0xd0/0x15c [ 242.763964] [<ffff000008d09008>] wait_for_completion+0x28/0x34 [ 242.769825] [<ffff000008a1a9f4>] mmc_wait_for_req_done+0x40/0x124 [ 242.775949] [<ffff000008a1ab98>] mmc_wait_for_req+0xc0/0xf8 [ 242.781549] [<ffff000008a1ac3c>] mmc_wait_for_cmd+0x6c/0x84 [ 242.787149] [<ffff000008a26610>] mmc_io_rw_direct_host+0x9c/0x114 [ 242.793270] [<ffff000008a26aa0>] sdio_reset+0x34/0x7c [ 242.798347] [<ffff000008a1d46c>] mmc_rescan+0x2fc/0x360 [ ... ] Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2017-04-07T23:49:43Z Olof Johansson 2017-04-07T23:49:43Z urn:sha1:12d28f94eb35d6309c8d86dad75ece76ee5c392e Allwinner fixes for 4.11, bis Two fixes for the recent A33 cpufreq support, and one to fix a missing register in the A64 USB PHY node. * tag 'sunxi-fixes-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: arm64: allwinner: a64: add pmu0 regs for USB PHY ARM: sun8i: a33: add operating-points-v2 property to all nodes ARM: sun8i: a33: remove highest OPP to fix CPU crashes Signed-off-by: Olof Johansson <olof@lixom.net> 2017-04-06T07:13:10Z Icenowy Zheng 2017-04-05T14:30:34Z urn:sha1:0d98479738b950e30bb4f782d60099d44076ad67 The USB PHY in A64 has a "pmu0" region, which controls the EHCI/OHCI controller pair that can be connected to the PHY0. Add the MMIO region for PHY node. Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> 2017-03-22T17:14:14Z Jon Mason 2017-03-21T20:51:19Z urn:sha1:f0c0cb99f74c03e2407ea553f6d46eb611e262b5 Cache related issues with DMA rings and performance issues related to caching are being caused by not properly setting the "dma-coherent" flag in the device tree entries. Adding it here to correct the issue. Signed-off-by: Jon Mason <jon.mason@broadcom.com> Fixes: fd5e5dd56 ("arm64: dts: Add PCIe0 and PCIe4 DT nodes for NS2") Fixes: dddc3c9d7 ("arm64: dts: NS2: add AMAC ethernet support") Fixes: e79249143 ("arm64: dts: Add Broadcom Northstar2 device tree entries for PDC driver") Fixes: ac9aae00f ("arm64: dts: Add SATA3 AHCI and SATA3 PHY DT nodes for NS2") Fixes: efc877676 ("arm64: dts: Add SDHCI DT node for NS2") Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> 2017-03-02T22:08:31Z Arnd Bergmann 2017-03-02T16:54:34Z urn:sha1:ca2dea434d10e3a676482fdf6df17d20cdb3e907 Merge "ARMv8 Juno DT fix for v4.11" from Sudeep Holla: Just single patch to fix replicator in order to prevent overflows at the source and reduce the back pressure by splitting the trace output to TPIU and ETR. * tag 'juno-fixes-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux: arm64: dts: juno: update definition for programmable replicator 2017-03-02T16:52:44Z Arnd Bergmann 2017-03-02T16:52:44Z urn:sha1:d4b80d9aacfa760cf0f363caec33b6d54f3afa2b * next/late: (25 commits) arm64: dts: exynos: Add regulators for Vbus and Vbus-Boost arm64: dts: exynos: Add USB 3.0 controller node for Exynos7 arm64: dts: exynos: Use macros for pinctrl configuration on Exynos7 pinctrl: dt-bindings: samsung: Add Exynos7 specific pinctrl macro definitions arm64: dts: exynos: Add initial configuration for DISP clocks for TM2/TM2e ARM64: dts: meson-gxbb-p200: add ADC laddered keys ARM64: dts: meson: meson-gx: add the SAR ADC ARM64: dts: meson-gxl: add the pwm_ao_b pin ARM64: dts: meson-gx: add the missing pwm_AO_ab node clk: gxbb: fix CLKID_ETH defined twice clk: samsung: exynos5433: Add data for 250MHz and 278MHz PLL rates clk: samsung: exynos5433: Add IDs for PHYCLK_MIPIDPHY0_* clocks ARM64: dts: meson-gxl: rename Nexbox A95x for consistency clk: gxbb: add the SAR ADC clocks and expose them dt-bindings: amlogic: Add WeTek boards ARM64: dts: meson-gxbb: Add support for WeTek Hub and Play dt-bindings: vendor-prefix: Add wetek vendor prefix ARM64: dts: meson-gxm: Rename q200 and q201 DT files for consistency ARM64: dts: meson-gx: Add HDMI HPD/DDC pinctrl nodes ARM64: dts: meson-gxbb-vega-s95: Add LED ... Signed-off-by: Arnd Bergmann <arnd@arndb.de> 2017-02-23T23:52:14Z Linus Torvalds 2017-02-23T23:52:14Z urn:sha1:c61c15e08abb4365f100e411604b57a03ee5ae90 Pull ARM 64-bit DT updates from Arnd Bergmann: "ARM64 DT updates are fairly small this time, only two new SoCs and a handful of new machines get added, all of them similar to other hardware we already support. New SoC: - HiSilicon Kirin960/Hi3660 and HiKey960 development board - NXP LS1012a with three reference boards: http://www.nxp.com/products/microcontrollers-and-processors/arm-processors/qoriq-layerscape-arm-processors/qoriq-layerscape-1012a-low-power-communication-processor:LS1012A New development board: - Banana Pi M64, based on Allwinner A64: http://www.banana-pi.org/m64.html - SolidRun MACCHIATOBin based on Marvell Armada 8K: https://www.solid-run.com/marvell-armada-family/armada-8040-community-board/ - Broadcom BCM958712DxXMC NorthStar2 reference board (another one) A lot of platforms improve support for existing machines by adding extra devices for which a binding and driver is availabe: Allwinner: - MMC, USB ARM Juno: - Coresight, STM Broadcom: - NS2 GICv2m irqchip and PCIe Marvell: - Armada 3700 SPI, I2C, ethernet switch Mediatek: - MT8173 thermal NXP i.MX: - LS1046A thermal Qualcomm: - coresight on MSM8916, HDMI, WCNSS, SCM Renesas: - r8a779[56] thermal, powerdomain, ethernet, sound, pwm, can, can fd Rockchip: - thermal, eDP, pinctrl enhancements Samsung: - TM2 touchkey, Exynos5433 HDMI and power management improvements UniPhier: - SD reset, eMMC controller ZTE: - oppv2 cpufreq" * tag 'armsoc-dt64' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (110 commits) arm64: dts: qcom: Add msm8916 CoreSight components arm64: dts: marvell: adjust name of sd-mmc-gop clock in syscon arm64: allwinner: add BananaPi-M64 support arm64: allwinner: a64: add UART1 pin nodes arm64: allwinner: pine64: add MMC support arm64: allwinner: a64: Increase the MMC max frequency arm64: allwinner: a64: Add MMC pinctrl nodes arm64: allwinner: a64: Add MMC nodes dt-bindings: clockgen: Add compatible string for LS1012A Documentation: DT: add LS1012A compatible for SCFG and DCFG Documentation: DT: Add entry for FSL LS1012A RDB, FRDM, QDS boards arm64: dts: marvell: add generic-ahci compatibles for CP110 ahci arm64: tegra: Use symbolic reset identifiers arm64: dts: r8a7796: Mark EthernetAVB device node disabled arm64: dts: r8a7795: Mark EthernetAVB device node disabled arm64: dts: r8a7795: tidyup audma definition order arm64: dts: r8a7796: Link ARM GIC to clock and clock domain arm64: dts: r8a7795: Link ARM GIC to clock and clock domain arm64: dts: r8a7796: Add R-Car Gen3 thermal support arm64: dts: r8a7795: Add R-Car Gen3 thermal support ... 2017-02-22T19:15:59Z Linus Torvalds 2017-02-22T19:15:59Z urn:sha1:8ff546b801e5cca0337c0f0a7234795d0a6309a1 Pull USB/PHY updates from Greg KH: "Here is the big USB and PHY driver updates for 4.11-rc1. Nothing major, just the normal amount of churn in the usb gadget and dwc and xhci controllers, new device ids, new phy drivers, a new usb-serial driver, and a few other minor changes in different USB drivers. All have been in linux-next for a long time with no reported issues" * tag 'usb-4.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (265 commits) usb: cdc-wdm: remove logically dead code USB: serial: keyspan: drop header file USB: serial: io_edgeport: drop io-tables header file usb: musb: add code comment for clarification usb: misc: add USB251xB/xBi Hi-Speed Hub Controller Driver usb: misc: usbtest: remove redundant check on retval < 0 USB: serial: upd78f0730: sort device ids USB: serial: upd78f0730: add ID for EVAL-ADXL362Z ohci-hub: fix typo in dbg_port macro usb: musb: dsps: Manage CPPI 4.1 DMA interrupt in DSPS usb: musb: tusb6010: Clean up tusb_omap_dma structure usb: musb: cppi_dma: Clean up cppi41_dma_controller structure usb: musb: cppi_dma: Clean up cppi structure usb: musb: cppi41: Detect aborted transfers in cppi41_dma_callback() usb: musb: dma: Add a DMA completion platform callback drivers: usb: usbip: Add missing break statement to switch usb: mtu3: remove redundant dev_err call in get_ssusb_rscs() USB: serial: mos7840: fix another NULL-deref at open USB: serial: console: clean up sanity checks USB: serial: console: fix uninitialised spinlock ... 2017-02-21T16:02:02Z Mike Leach 2017-02-17T19:13:10Z urn:sha1:7e6a69ee954caf8dd8c98f70c8ee894c8ebfdcf0 Juno platforms have a programmable replicator splitting the trace output to TPIU and ETR. Currently this is not being programmed as it is being treated as a none-programmable replicator - which is the default operational mode for these devices. The TPIU in the system is enabled by default, and this combination is causing back-pressure in the trace system resulting in overflows at the source. Replaces the existing definition with one that defines the programmable replicator, using the "qcom,coresight-replicator1x" driver that provides the correct functionality for CoreSight programmable replicators. Reviewed-and-Tested-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Mike Leach <mike.leach@linaro.org> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>