<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/arm64/boot/dts/microchip, branch linux-5.12.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.12.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.12.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2020-12-10T10:55:31Z</updated>
<entry>
<title>arm64: dts: sparx5: Add SGPIO devices</title>
<updated>2020-12-10T10:55:31Z</updated>
<author>
<name>Lars Povlsen</name>
</author>
<published>2020-11-13T14:51:51Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7e1f91cbfa0d330fad61c621389373cff81898fd'/>
<id>urn:sha1:7e1f91cbfa0d330fad61c621389373cff81898fd</id>
<content type='text'>
This adds SGPIO devices for the Sparx5 SoC and configures it for the
applicable reference boards.

Signed-off-by: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
Reviewed-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Link: https://lore.kernel.org/r/20201113145151.68900-4-lars.povlsen@microchip.com
</content>
</entry>
<entry>
<title>arm64: dts: sparx5: Add reset support</title>
<updated>2020-12-10T10:50:43Z</updated>
<author>
<name>Lars Povlsen</name>
</author>
<published>2020-10-06T20:03:16Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5ef399aa5c5f9c4c2ac9208d1f00e935f13012ce'/>
<id>urn:sha1:5ef399aa5c5f9c4c2ac9208d1f00e935f13012ce</id>
<content type='text'>
This adds reset support to the Sparx5 SoC DT.

Signed-off-by: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
Link: https://lore.kernel.org/r/20201006200316.2261245-4-lars.povlsen@microchip.com
</content>
</entry>
<entry>
<title>arm64: dts: sparx5: Add spi-nand devices</title>
<updated>2020-09-16T09:39:51Z</updated>
<author>
<name>Lars Povlsen</name>
</author>
<published>2020-08-24T20:30:10Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5df50128050d01d300f28d9bca4dd89d6d24de3d'/>
<id>urn:sha1:5df50128050d01d300f28d9bca4dd89d6d24de3d</id>
<content type='text'>
This patch add spi-nand DT nodes to the applicable Sparx5 boards.

Signed-off-by: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
Link: https://lore.kernel.org/r/20200824203010.2033-7-lars.povlsen@microchip.com
</content>
</entry>
<entry>
<title>arm64: dts: sparx5: Add spi-nor support</title>
<updated>2020-09-16T09:38:20Z</updated>
<author>
<name>Lars Povlsen</name>
</author>
<published>2020-08-24T20:30:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ba4d1c074fd7e5f5d1a5b025b510fd542fc04da5'/>
<id>urn:sha1:ba4d1c074fd7e5f5d1a5b025b510fd542fc04da5</id>
<content type='text'>
This add spi-nor device nodes to the Sparx5 reference boards.

Signed-off-by: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
Link: https://lore.kernel.org/r/20200824203010.2033-6-lars.povlsen@microchip.com
</content>
</entry>
<entry>
<title>arm64: dts: sparx5: Add SPI controller and associated mmio-mux</title>
<updated>2020-09-16T08:34:21Z</updated>
<author>
<name>Lars Povlsen</name>
</author>
<published>2020-08-24T20:30:07Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=08ee16e95492f41d69df3b7fbd942d35dfece6a9'/>
<id>urn:sha1:08ee16e95492f41d69df3b7fbd942d35dfece6a9</id>
<content type='text'>
This adds a SPI controller to the Microchip Sparx5 SoC, as well as the
mmio-mux that is required to select the right SPI interface for a
given SPI device.

Signed-off-by: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
Link: https://lore.kernel.org/r/20200824203010.2033-4-lars.povlsen@microchip.com
</content>
</entry>
<entry>
<title>arm64: dts: sparx5: Add hwmon temperature sensor</title>
<updated>2020-09-16T07:36:01Z</updated>
<author>
<name>Lars Povlsen</name>
</author>
<published>2020-04-28T14:50:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d14f6a1ae07f034921741c631ba83ceb97fe6734'/>
<id>urn:sha1:d14f6a1ae07f034921741c631ba83ceb97fe6734</id>
<content type='text'>
This adds a hwmon temperature node sensor to the Sparx5 SoC.

Signed-off-by: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
Link: https://lore.kernel.org/r/20200618135951.25441-3-lars.povlsen@microchip.com
</content>
</entry>
<entry>
<title>arm64: dts: sparx5: Add Sparx5 eMMC support</title>
<updated>2020-09-16T07:29:08Z</updated>
<author>
<name>Lars Povlsen</name>
</author>
<published>2020-04-28T12:40:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=45145406f30c693564904335d216c3b18c0e1e8b'/>
<id>urn:sha1:45145406f30c693564904335d216c3b18c0e1e8b</id>
<content type='text'>
This adds eMMC support to the applicable Sparx5 board configuration
files.

Signed-off-by: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
Link: https://lore.kernel.org/r/20200825081357.32354-4-lars.povlsen@microchip.com
</content>
</entry>
<entry>
<title>arm64: dts: sparx5: Add i2c devices, i2c muxes</title>
<updated>2020-07-28T09:13:49Z</updated>
<author>
<name>Lars Povlsen</name>
</author>
<published>2020-06-15T13:32:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=623910f4b9f5a4db49c8cc4b824c1f32236a6f33'/>
<id>urn:sha1:623910f4b9f5a4db49c8cc4b824c1f32236a6f33</id>
<content type='text'>
This patch adds i2c devices and muxes to the Sparx5 reference boards.

Link: https://lore.kernel.org/r/20200615133242.24911-11-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>arm64: dts: sparx5: Add Sparx5 SoC DPLL clock</title>
<updated>2020-07-28T09:13:48Z</updated>
<author>
<name>Lars Povlsen</name>
</author>
<published>2020-06-15T13:32:41Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e4e06a50b04296d17a4cf098a515fb452106ecf0'/>
<id>urn:sha1:e4e06a50b04296d17a4cf098a515fb452106ecf0</id>
<content type='text'>
This adds a DPLL clock to the Sparx5 SoC. It is used to generate clock
to misc peripherals, specifically the SDHCI/eMMC controller.

Link: https://lore.kernel.org/r/20200615133242.24911-10-lars.povlsen@microchip.com
Signed-off-by: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>arm64: dts: sparx5: Add pinctrl support</title>
<updated>2020-07-22T20:28:40Z</updated>
<author>
<name>Lars Povlsen</name>
</author>
<published>2020-06-15T13:32:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=14bc6703b387cac2a9bec8f8d6bbffea63db43ea'/>
<id>urn:sha1:14bc6703b387cac2a9bec8f8d6bbffea63db43ea</id>
<content type='text'>
This add pinctrl support to the Microchip Sparx5 SoC.

Link: https://lore.kernel.org/r/20200615133242.24911-5-lars.povlsen@microchip.com
Reviewed-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: Lars Povlsen &lt;lars.povlsen@microchip.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
</feed>
