kernel.git/arch/arm/vfp, branch linux-2.6.30.y

[ARM] 5440/1: Fix VFP state corruption due to preemption during VFP exceptions

2009-04-01T21:17:50Z

We've observed that ARM VFP state can be corrupted during VFP exception handling when PREEMPT is enabled. The exact conditions are difficult to reproduce but appear to occur during VFP exception handling when a task causes a VFP exception which is handled via VFP_bounce and is then preempted by yet another task which in turn causes yet another VFP exception. Since the VFP_bounce code is not preempt safe, VFP state then becomes corrupt. In order to prevent preemption from occuring while handling a VFP exception, this patch disables preemption while handling VFP exceptions. Signed-off-by: George G. Davis Acked-by: Catalin Marinas Signed-off-by: Russell King

[ARM] 5388/1: Add hwcap bits for VFPv3 and VFPv3D16

2009-02-12T10:59:44Z

The VFPv3D16 is a VFPv3 CPU configuration where only 16 double registers are present, as the VFPv2 configuration. This patch adds the corresponding hwcap bits so that applications or debuggers have more information about the supported features. Signed-off-by: Catalin Marinas Signed-off-by: Russell King

[ARM] 5387/1: Add ptrace VFP support on ARM

2009-02-12T10:59:43Z

This patch adds ptrace support for setting and getting the VFP registers using PTRACE_SETVFPREGS and PTRACE_GETVFPREGS. The user_vfp structure defined in asm/user.h contains 32 double registers (to cover VFPv3 and Neon hardware) and the FPSCR register. Cc: Paul Brook Cc: Daniel Jacobowitz Signed-off-by: Catalin Marinas Signed-off-by: Russell King

[ARM] 5349/1: VFP: Add PM code to save and restore current VFP state

2008-12-18T21:21:34Z

When CONFIG_PM is selected, the VFP code does not have any handler installed to deal with either saving the VFP state of the current task, nor does it do anything to try and restore the VFP after a resume. On resume, the VFP will have been reset and the co-processor access control registers are in an indeterminate state (very probably the CP10 and CP11 the VFP uses will have been disabled by the ARM core reset). When this happens, resume will break as soon as it tries to unfreeze the tasks and restart scheduling. Add a sys device to allow us to hook the suspend call to save the current thread state if the thread is using VFP and a resume hook which restores the CP10/CP11 access and ensures the VFP is disabled so that the lazy swapping will take place on next access. Signed-off-by: Ben Dooks Signed-off-by: Russell King

ARMv7: Branch over conditional undefined instructions in vfphw.S

2008-11-06T13:23:08Z

On ARMv7, conditional undefined instructions may generate exceptions even if the condition is not met. The vfphw.S contains the FPINST and FPINST2 access instructions which may not be present on processors with synchronous VFP exceptions. Signed-off-by: Catalin Marinas

Add HWCAP_NEON to the ARM hwcap.h file

2008-11-06T13:23:07Z

Signed-off-by: Catalin Marinas

[ARM] 5227/1: Add the ENDPROC declarations to the .S files

2008-09-01T11:06:34Z

This declaration specifies the "function" type and size for various assembly functions, mainly needed for generating the correct branch instructions in Thumb-2. Signed-off-by: Catalin Marinas Signed-off-by: Russell King

smp_call_function: get rid of the unused nonatomic/retry argument

2008-06-26T09:24:35Z

It's never used and the comments refer to nonatomic and retry interchangably. So get rid of it. Acked-by: Jeremy Fitzhardinge Signed-off-by: Jens Axboe

[ARM] 4583/1: ARMv7: Add VFPv3 support

2008-01-26T14:41:28Z

This patch adds the support for VFPv3 (the kernel currently supports VFPv2). The main difference is 32 double registers (compared to 16). Signed-off-by: Catalin Marinas Signed-off-by: Russell King

[ARM] 4582/2: Add support for the common VFP subarchitecture

2008-01-26T14:41:28Z

This patch allows the VFP support code to run correctly on CPUs compatible with the common VFP subarchitecture specification (Appendix B in the ARM ARM v7-A and v7-R edition). It implements support for VFP subarchitecture 2 while being backwards compatible with subarchitecture 1. On VFP subarchitecture 1, the arithmetic exceptions are asynchronous (or imprecise as described in the old ARM ARM) unless the FPSCR.IXE bit is 1. The exceptional instructions can be read from FPINST and FPINST2 registers. With VFP subarchitecture 2, the arithmetic exceptions can also be synchronous and marked by the FPEXC.DEX bit (the FPEXC.EX bit is cleared). CPUs implementing the synchronous arithmetic exceptions don't have the FPINST and FPINST2 registers and accessing them would trigger and undefined exception. Note that FPEXC.EX bit has an additional meaning on subarchitecture 1 - if it isn't set, there is no additional information in FPINST and FPINST2 that needs to be saved at context switch or when lazy-loading the VFP state of a different thread. The patch also removes the clearing of the cumulative exception flags in FPSCR when additional exceptions were raised. It is up to the user application to clear these bits. Signed-off-by: Catalin Marinas Signed-off-by: Russell King