kernel.git/arch/arm/mm/init.c, branch linux-5.5.y

ARM: 8949/1: mm: mark free_memmap as __init

2020-02-14T21:53:03Z

commit 31f3010e60522ede237fb145a63b4af5a41718c2 upstream. As of commit ac7c3e4ff401 ("compiler: enable CONFIG_OPTIMIZE_INLINING forcibly"), free_memmap() might not always be inlined, and thus is triggering a section warning: WARNING: vmlinux.o(.text.unlikely+0x904): Section mismatch in reference from the function free_memmap() to the function .meminit.text:memblock_free() Mark it as __init, since the faller (free_unused_memmap) already is. Fixes: ac7c3e4ff401 ("compiler: enable CONFIG_OPTIMIZE_INLINING forcibly") Signed-off-by: Olof Johansson Signed-off-by: Russell King Signed-off-by: Greg Kroah-Hartman

ARM: 8917/1: mm: include

2019-10-27T21:14:51Z

The definitions of set_kernel_text_rw() and set_kernel_text_ro() are in but this is not included in init.c which defines these. Silence the following warnings by including the header. arch/arm/mm/init.c:669:6: warning: symbol 'set_kernel_text_rw' was not declared. Should it be static? arch/arm/mm/init.c:678:6: warning: symbol 'set_kernel_text_ro' was not declared. Should it be static? Signed-off-by: Ben Dooks Signed-off-by: Russell King

ARM: 8916/1: mm: make set_section_perms() static

2019-10-27T21:14:49Z

The set_section_perms() is not defined outside of the init.c file, so make it static to avoid the following warning: arch/arm/mm/init.c:596:6: warning: symbol 'set_section_perms' was not declared. Should it be static? Signed-off-by: Ben Dooks Signed-off-by: Russell King

ARM: 8907/1: arch: reuse addr variable in pfn_valid

2019-10-27T21:14:34Z

Avoid calling __pfn_to_phys twice. Signed-off-by: Clemens Gruber Signed-off-by: Russell King

ARM: 8901/1: add a criteria for pfn_valid of arm

2019-08-28T22:30:21Z

pfn_valid can be wrong when parsing a invalid pfn whose phys address exceeds BITS_PER_LONG as the MSB will be trimed when shifted. The issue originally arise from bellowing call stack, which corresponding to an access of the /proc/kpageflags from userspace with a invalid pfn parameter and leads to kernel panic. [46886.723249] c7 [] (stable_page_flags) from [] [46886.723264] c7 [] (kpageflags_read) from [] [46886.723280] c7 [] (proc_reg_read) from [] [46886.723290] c7 [] (__vfs_read) from [] [46886.723301] c7 [] (vfs_read) from [] [46886.723315] c7 [] (SyS_pread64) from [] (ret_fast_syscall+0x0/0x28) Signed-off-by: Zhaoyang Huang Signed-off-by: Russell King

ARM: 8874/1: mm: only adjust sections of valid mm structures

2019-08-23T10:32:36Z

A timing hazard exists when an early fork/exec thread begins exiting and sets its mm pointer to NULL while a separate core tries to update the section information. This commit ensures that the mm pointer is not NULL before setting its section parameters. The arguments provided by commit 11ce4b33aedc ("ARM: 8672/1: mm: remove tasklist locking from update_sections_early()") are equally valid for not requiring grabbing the task_lock around this check. Fixes: 08925c2f124f ("ARM: 8464/1: Update all mm structures with section adjustments") Signed-off-by: Doug Berger Acked-by: Laura Abbott Cc: Mike Rapoport Cc: Andrew Morton Cc: Florian Fainelli Cc: Rob Herring Cc: "Steven Rostedt (VMware)" Cc: Peng Fan Cc: Geert Uytterhoeven Signed-off-by: Russell King

arm: use swiotlb for bounce buffering on LPAE configs

2019-07-24T15:29:01Z

The DMA API requires that 32-bit DMA masks are always supported, but on arm LPAE configs they do not currently work when memory is present above 4GB. Wire up the swiotlb code like for all other architectures to provide the bounce buffering in that case. Fixes: 21e07dba9fb11 ("scsi: reduce use of block bounce buffers"). Reported-by: Roger Quadros Signed-off-by: Christoph Hellwig Tested-by: Vignesh Raghavendra

Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm

2019-07-09T04:08:34Z

Pull ARM updates from Russell King: - Add a "cut here" to make it clearer where oops dumps should be cut from - we already have a marker for the end of the dumps. - Add logging severity to show_pte() - Drop unnecessary common-page-size linker flag - Errata workarounds for Cortex A12 857271, Cortex A17 857272 and Cortex A7 814220. - Remove some unused variables that had started to provoke a compiler warning. * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 8863/1: stm32: select ARM errata 814220 ARM: 8862/1: errata: 814220-B-Cache maintenance by set/way operations can execute out of order ARM: 8865/1: mm: remove unused variables ARM: 8864/1: Add workaround for I-Cache line size mismatch between CPU cores ARM: 8861/1: errata: Workaround errata A12 857271 / A17 857272 ARM: 8860/1: VDSO: Drop implicit common-page-size linker flag ARM: arrange show_pte() to issue severity-based messages ARM: add "8<--- cut here ---" to kernel dumps

ARM: 8865/1: mm: remove unused variables

2019-06-20T21:29:59Z

Fix gcc warnings: arch/arm/mm/init.c: In function 'mem_init': arch/arm/mm/init.c:456:13: warning: unused variable 'itcm_end' [-Wunused-variable] extern u32 itcm_end; ^ arch/arm/mm/init.c:455:13: warning: unused variable 'dtcm_end' [-Wunused-variable] extern u32 dtcm_end; ^ They are not used any more since commit 1c31d4e96b8c ("ARM: 8820/1: mm: Stop printing the virtual memory layout") Link: https://lkml.org/lkml/2019/5/12/82 Signed-off-by: YueHaibing Reviewed-by: Geert Uytterhoeven Reviewed-by: Krzysztof Kozlowski Signed-off-by: Russell King

ARM: 8864/1: Add workaround for I-Cache line size mismatch between CPU cores

2019-06-20T21:29:58Z

Some big.LITTLE systems have I-Cache line size mismatch between LITTLE and big cores. This patch adds a workaround for proper I-Cache support on such systems. Without it, some class of the userspace code (typically self-modifying) might suffer from random SIGILL failures. Similar workaround already exists for ARM64 architecture. I has been added by commit 116c81f427ff ("arm64: Work around systems with mismatched cache line sizes"). Signed-off-by: Marek Szyprowski Signed-off-by: Russell King