<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/arm/mm/Makefile, branch linux-3.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.17.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.17.y'/>
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<updated>2014-05-29T23:49:01Z</updated>
<entry>
<title>ARM: l2c: provide common PL310 early resume code</title>
<updated>2014-05-29T23:49:01Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2014-04-05T10:39:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=de7e75326c05c10ebd96aed9440c870f0ff1e34f'/>
<id>urn:sha1:de7e75326c05c10ebd96aed9440c870f0ff1e34f</id>
<content type='text'>
Provide a common assembly implementation for PL310 resume code.  Certain
platforms need to re-initialise the L2C cache early as it may preserve
data across a S2RAM cycle, and therefore must be enabled along with the
L1 cache and MMU.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: outer cache: add WARN_ON() to outer_disable()</title>
<updated>2014-05-29T23:47:23Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2014-03-16T13:14:38Z</published>
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<id>urn:sha1:1f1d5b745a4617a2cb2ffd8f4a9bc3be664cfc98</id>
<content type='text'>
Add WARN_ON() conditions to outer_disable() to ensure that its
requirements aren't violated.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: add support to dump the kernel page tables</title>
<updated>2013-12-11T09:53:13Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2013-10-23T15:13:02Z</published>
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<id>urn:sha1:1fd15b879d0075c8916e52fb9e52522827433d1f</id>
<content type='text'>
This patch allows the kernel page tables to be dumped via a debugfs file,
allowing kernel developers to check the layout of the kernel page tables
and the verify the various permissions and type settings.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-rmk/hugepages' of git://git.linaro.org/people/stevecapper/linux into devel-stable</title>
<updated>2013-06-18T19:05:48Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2013-06-18T19:03:30Z</published>
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<id>urn:sha1:b3f288de7c8add67a3364e989b865b6537838662</id>
<content type='text'>
These changes bring both HugeTLB support and Transparent HugePage
(THP) support to ARM.  Only long descriptors (LPAE) are supported
in this series.

The code has been tested on an Arndale board (Exynos 5250).
</content>
</entry>
<entry>
<title>ARM: mm: HugeTLB support for LPAE systems.</title>
<updated>2013-06-04T15:52:37Z</updated>
<author>
<name>Catalin Marinas</name>
</author>
<published>2012-07-25T13:32:38Z</published>
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<id>urn:sha1:1355e2a6eb88f04d76125c057dc5fca64d4b6a9e</id>
<content type='text'>
This patch adds support for hugetlbfs based on the x86 implementation.
It allows mapping of 2MB sections (see Documentation/vm/hugetlbpage.txt
for usage). The 64K pages configuration is not supported (section size
is 512MB in this case).

Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
[steve.capper@linaro.org: symbolic constants replace numbers in places.
Split up into multiple files, to simplify future non-LPAE support,
removed huge_pmd_share code, as this is very rarely executed,
Added PROT_NONE support].
Signed-off-by: Steve Capper &lt;steve.capper@linaro.org&gt;
Reviewed-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-next' of git://git.pengutronix.de/git/ukl/linux into devel-stable</title>
<updated>2013-05-22T09:52:24Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2013-05-19T00:22:53Z</published>
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<id>urn:sha1:f150abe1012f2fc7d444d33d651db32435038c11</id>
<content type='text'>
Pull ARM-v7M support from Uwe Kleine-König:
"All but the last patch were in next since next-20130418 without issues.
The last patch fixes a problem in combination with

  8164f7a (ARM: 7680/1: Detect support for SDIV/UDIV from ISAR0 register)

which triggers a WARN_ON without an implemented read_cpuid_ext.

The branch merges fine into v3.10-rc1 and I'd be happy if you pulled it
for 3.11-rc1. The only missing piece to be able to run a Cortex-M3 is
the irqchip driver that will go in via Thomas Gleixner and platform
specific stuff."
</content>
</entry>
<entry>
<title>ARM: ARMv7-M: Allow the building of new kernel port</title>
<updated>2013-04-17T19:45:09Z</updated>
<author>
<name>Uwe Kleine-König</name>
</author>
<published>2013-03-21T20:02:37Z</published>
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<id>urn:sha1:4477ca45fb368880bf77b10ed3b24b03f0cc82da</id>
<content type='text'>
This patch modifies the required Kconfig and Makefile files to allow the
building of kernel for Cortex-M3.

Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Reviewed-by: Jonathan Austin &lt;jonathan.austin@arm.com&gt;
Tested-by: Jonathan Austin &lt;jonathan.austin@arm.com&gt;
Signed-off-by: Uwe Kleine-König &lt;u.kleine-koenig@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>ARM: cache: remove ARMv3 support code</title>
<updated>2013-03-26T09:55:23Z</updated>
<author>
<name>Will Deacon</name>
</author>
<published>2013-01-15T12:07:40Z</published>
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<id>urn:sha1:82d9b0d0c6c4cbd5d0022d7df5e6bf071a9eb6c7</id>
<content type='text'>
This is only used by 740t, which is a v4 core and (by my reading of the
datasheet for the CPU) ignores CRm for the cp15 cache flush operation,
making the v4 cache implementation in cache-v4.S sufficient for this
CPU.

Tested with 740T core-tile on Integrator/AP baseboard.

Acked-by: Hyok S. Choi &lt;hyok.choi@samsung.com&gt;
Acked-by: Greg Ungerer &lt;gerg@uclinux.org&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: 7644/1: vmregion: remove vmregion code entirely</title>
<updated>2013-02-16T17:54:21Z</updated>
<author>
<name>Joonsoo Kim</name>
</author>
<published>2013-02-09T05:28:04Z</published>
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<id>urn:sha1:48dc369d21b41f6400d15cdaf9411e2e6fd62323</id>
<content type='text'>
Now, there is no user for vmregion.
So remove it.

Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Tested-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Signed-off-by: Joonsoo Kim &lt;iamjoonsoo.kim@lge.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: Remove support for ARMv3 ARM610 and ARM710 CPUs</title>
<updated>2012-05-05T04:50:50Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2012-05-04T11:04:26Z</published>
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<id>urn:sha1:357c9c1f07d4546bc3fbc0fd1044d96b114d14ed</id>
<content type='text'>
This patch removes support for ARMv3 CPUs, which haven't worked properly
for quite some time (see the FIXME comment in arch/arm/mm/fault.c).  The
only V3 parts left is the cache model for ARMv3, which is needed for some
odd reason by ARM740T CPUs, and being able to build with -march=armv3,
which is required for the RiscPC platform due to its bus structure.

Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
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