<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/arm/mm/Kconfig, branch linux-3.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.2.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.2.y'/>
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<updated>2014-04-30T15:23:19Z</updated>
<entry>
<title>ARM: 7954/1: mm: remove remaining domain support from ARMv6</title>
<updated>2014-04-30T15:23:19Z</updated>
<author>
<name>Will Deacon</name>
</author>
<published>2014-02-07T18:12:27Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2324f8a281c84b19aef7251cde4df51876328d42'/>
<id>urn:sha1:2324f8a281c84b19aef7251cde4df51876328d42</id>
<content type='text'>
commit b6ccb9803e90c16b212cf4ed62913a7591e79a39 upstream.

CPU_32v6 currently selects CPU_USE_DOMAINS if CPU_V6 and MMU. This is
because ARM 1136 r0pX CPUs lack the v6k extensions, and therefore do
not have hardware thread registers. The lack of these registers requires
the kernel to update the vectors page at each context switch in order to
write a new TLS pointer. This write must be done via the userspace
mapping, since aliasing caches can lead to expensive flushing when using
kmap. Finally, this requires the vectors page to be mapped r/w for
kernel and r/o for user, which has implications for things like put_user
which must trigger CoW appropriately when targetting user pages.

The upshot of all this is that a v6/v7 kernel makes use of domains to
segregate kernel and user memory accesses. This has the nasty
side-effect of making device mappings executable, which has been
observed to cause subtle bugs on recent cores (e.g. Cortex-A15
performing a speculative instruction fetch from the GIC and acking an
interrupt in the process).

This patch solves this problem by removing the remaining domain support
from ARMv6. A new memory type is added specifically for the vectors page
which allows that page (and only that page) to be mapped as user r/o,
kernel r/w. All other user r/o pages are mapped also as kernel r/o.
Patch co-developed with Russell King.

Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
[bwh: Backported to 3.2:
 - Adjust filename, context
 - Drop condition on CONFIG_ARM_LPAE]
Signed-off-by: Ben Hutchings &lt;ben@decadent.org.uk&gt;
</content>
</entry>
<entry>
<title>Merge branch 'imx/imx6q' into next/soc</title>
<updated>2011-11-02T01:46:55Z</updated>
<author>
<name>Arnd Bergmann</name>
</author>
<published>2011-11-02T01:46:55Z</published>
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<id>urn:sha1:abc3f126ac736280c68db6472eb0040ddf6e1b1f</id>
<content type='text'>
Conflicts:
	Documentation/devicetree/bindings/arm/fsl.txt
	arch/arm/Kconfig
	arch/arm/Kconfig.debug
	arch/arm/plat-mxc/include/mach/common.h
</content>
</entry>
<entry>
<title>arm/imx: merge i.MX3 and i.MX6</title>
<updated>2011-10-31T13:26:28Z</updated>
<author>
<name>Sascha Hauer</name>
</author>
<published>2011-09-27T05:48:02Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a89cf59b5c344e50b7be3cabb67dc1ed94439b6e'/>
<id>urn:sha1:a89cf59b5c344e50b7be3cabb67dc1ed94439b6e</id>
<content type='text'>
The patch merges the build of imx3 and imx6.  The Kconfig symbol
ARCH_IMX_V6_V7 is introduced to replace ARCH_MX3 and ARCH_MX6.

Signed-off-by: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Signed-off-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm/imx6q: add device tree machine support</title>
<updated>2011-10-31T13:26:26Z</updated>
<author>
<name>Shawn Guo</name>
</author>
<published>2011-09-06T07:05:25Z</published>
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<id>urn:sha1:13eed9897a2160272df2804ac3bbd4d91c76e577</id>
<content type='text'>
It adds generic device tree based machine support for imx6q.

Signed-off-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
</content>
</entry>
<entry>
<title>ARM: add Highbank core platform support</title>
<updated>2011-10-31T13:14:00Z</updated>
<author>
<name>Rob Herring</name>
</author>
<published>2011-06-07T15:02:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=220e6cf7b793d702596506a8c4bf1f4fd4040df1'/>
<id>urn:sha1:220e6cf7b793d702596506a8c4bf1f4fd4040df1</id>
<content type='text'>
This adds basic support for the Calxeda Highbank platform.

Signed-off-by: Rob Herring &lt;rob.herring@calxeda.com&gt;
Reviewed-by: Jamie Iles &lt;jamie@jamieiles.com&gt;
Reviewed-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc</title>
<updated>2011-07-27T00:41:04Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2011-07-27T00:41:04Z</published>
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<id>urn:sha1:69f1d1a6acbaa7d83ef3f4ee26209c58cd000204</id>
<content type='text'>
* 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (128 commits)
  ARM: S5P64X0: External Interrupt Support
  ARM: EXYNOS4: Enable MFC on Samsung NURI
  ARM: EXYNOS4: Enable MFC on universal_c210
  ARM: S5PV210: Enable MFC on Goni
  ARM: S5P: Add support for MFC device
  ARM: EXYNOS4: Add support FIMD on SMDKC210
  ARM: EXYNOS4: Add platform device and helper functions for FIMD
  ARM: EXYNOS4: Add resource definition for FIMD
  ARM: EXYNOS4: Change devname for FIMD clkdev
  ARM: SAMSUNG: Add IRQ_I2S0 definition
  ARM: SAMSUNG: Add platform device for idma
  ARM: EXYNOS4: Add more registers to be saved and restored for PM
  ARM: EXYNOS4: Add more register addresses of CMU
  ARM: EXYNOS4: Add platform device for dwmci driver
  ARM: EXYNOS4: configure rtc-s3c on NURI
  ARM: EXYNOS4: configure MAX8903 secondary charger on NURI
  ARM: EXYNOS4: configure ADC on NURI
  ARM: EXYNOS4: configure MAX17042 fuel gauge on NURI
  ARM: EXYNOS4: configure regulators and PMIC(MAX8997) on NURI
  ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs
  ...

Fix up tons of silly conflicts:
 - arch/arm/mach-davinci/include/mach/psc.h
 - arch/arm/mach-exynos4/Kconfig
 - arch/arm/mach-exynos4/mach-smdkc210.c
 - arch/arm/mach-exynos4/pm.c
 - arch/arm/mach-imx/mm-imx1.c
 - arch/arm/mach-imx/mm-imx21.c
 - arch/arm/mach-imx/mm-imx25.c
 - arch/arm/mach-imx/mm-imx27.c
 - arch/arm/mach-imx/mm-imx31.c
 - arch/arm/mach-imx/mm-imx35.c
 - arch/arm/mach-mx5/mm.c
 - arch/arm/mach-s5pv210/mach-goni.c
 - arch/arm/mm/Kconfig
</content>
</entry>
<entry>
<title>Merge branch 'zynq/master' of git+ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc into next/soc</title>
<updated>2011-07-17T19:43:26Z</updated>
<author>
<name>Arnd Bergmann</name>
</author>
<published>2011-07-17T19:43:26Z</published>
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<id>urn:sha1:3a6cb8ce07d994f6e4a3679c5478d0f18b6b86c4</id>
<content type='text'>
Conflicts:
	arch/arm/Kconfig
	arch/arm/mm/Kconfig
</content>
</entry>
<entry>
<title>ARM: CSR: Adding CSR SiRFprimaII board support</title>
<updated>2011-07-08T23:19:28Z</updated>
<author>
<name>Binghua Duan</name>
</author>
<published>2011-07-08T09:40:12Z</published>
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<id>urn:sha1:02c981c07bc95ac1e42ec6c817f0c28cf3fe993a</id>
<content type='text'>
SiRFprimaII is the latest generation application processor from CSR’s
Multifunction SoC product family. Designed around an ARM cortex A9 core,
high-speed memory bus, advanced 3D accelerator and full-HD multi-format
video decoder, SiRFprimaII is able to meet the needs of complicated
applications for modern multifunction devices that require heavy concurrent
applications and fluid user experience. Integrated with GPS baseband,
analog and PMU, this new platform is designed to provide a cost effective
solution for Automotive and Consumer markets.

This patch adds the basic support for this SoC and EVB board based on device
tree. It is following the ZYNQ of Xilinx in some degree.

Signed-off-by: Binghua Duan &lt;Binghua.Duan@csr.com&gt;
Signed-off-by: Rongjun Ying &lt;Rongjun.Ying@csr.com&gt;
Signed-off-by: Zhiwu Song &lt;Zhiwu.Song@csr.com&gt;
Signed-off-by: Yuping Luo &lt;Yuping.Luo@csr.com&gt;
Signed-off-by: Bin Shi &lt;Bin.Shi@csr.com&gt;
Signed-off-by: Huayi Li &lt;Huayi.Li@csr.com&gt;
Signed-off-by: Barry Song &lt;Baohua.Song@csr.com&gt;
Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>ARM: cns3xxx: Add support for L2 Cache Controller</title>
<updated>2011-07-07T14:48:38Z</updated>
<author>
<name>Anton Vorontsov</name>
</author>
<published>2011-07-06T12:45:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=93e85d8e902e1a4468c6ade5c6ec3dd3055a489f'/>
<id>urn:sha1:93e85d8e902e1a4468c6ade5c6ec3dd3055a489f</id>
<content type='text'>
CNS3xxx SOCs have L310-compatible cache controller, so let's use it.

With this patch benchmarking with 'gzip' shows that performance is
doubled, and I'm still able to boot full-fledged userland over NFS
(using PCIe NIC), so the support should be pretty robust.

p.s. While CNS3xxx reports that it has PL310, it still needs to wait
on cache line operations, so we should not select 'CACHE_PL310',
which is a micro-optimization that removes these waits for v7 CPUs.
Someday we'd better rename CACHE_PL310 Kconfig option into
NO_CACHE_WAIT or something less ambiguous.

Signed-off-by: Anton Vorontsov &lt;avorontsov@mvista.com&gt;
</content>
</entry>
<entry>
<title>ARM: Xilinx: Adding Xilinx board support</title>
<updated>2011-06-20T17:52:30Z</updated>
<author>
<name>John Linn</name>
</author>
<published>2011-06-20T17:47:27Z</published>
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<id>urn:sha1:b85a3ef4ac65169b65fd2fe9bec7912bbf475ba4</id>
<content type='text'>
The 1st board support is minimal to get a system up and running
on the Xilinx platform.

This platform reuses the clock implementation from plat-versatile, and
it depends entirely on CONFIG_OF support.  There is only one board
support file which obtains all device information from a device tree
dtb file which is passed to the kernel at boot time.

Signed-off-by: John Linn &lt;john.linn@xilinx.com&gt;
</content>
</entry>
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