<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/arm/mach-versatile, branch linux-2.6.19.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.19.y</id>
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<updated>2006-10-11T18:17:06Z</updated>
<entry>
<title>[PATCH] arm-versatile iomem annotations</title>
<updated>2006-10-11T18:17:06Z</updated>
<author>
<name>Al Viro</name>
</author>
<published>2006-10-11T16:22:34Z</published>
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<id>urn:sha1:399ad77b9098ed2eb27cbfbeb6449c1caab3c18e</id>
<content type='text'>
Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>Initial blind fixup for arm for irq changes</title>
<updated>2006-10-06T17:59:54Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2006-10-06T17:53:39Z</published>
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<id>urn:sha1:0cd61b68c340a4f901a06e8bb5e0dea4353161c0</id>
<content type='text'>
Untested, but this should fix up the bulk of the totally mechanical
issues, and should make the actual detail fixing easier.

Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>[ARM] 3860/1: Versatile PCI config byte accesses</title>
<updated>2006-09-27T08:35:07Z</updated>
<author>
<name>Paul Brook</name>
</author>
<published>2006-09-24T15:54:40Z</published>
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<id>urn:sha1:c06015148fa9a3cc452ec7121b8c3f59f4a7d6ac</id>
<content type='text'>
The ARM Versatile board PCI config space read routines are broken for byte
accesses.  The access uses a byte read, so masking the bottom two bits of the
address is wrong.

I guess this is a cut/paste error from the the halfword code which uses
aligned word access+shift+mask.

Signed-off-by: Paul Brook &lt;paul@codesourcery.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>[ARM] 3752/1: fix versatile flash resource map</title>
<updated>2006-08-13T13:17:12Z</updated>
<author>
<name>Yoav Steinberg</name>
</author>
<published>2006-08-13T13:17:12Z</published>
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<id>urn:sha1:a0c5a64552e3c57d7f9eb593c6ce21a285ac86b4</id>
<content type='text'>
Patch from Yoav Steinberg

Flash resource mapping for versatile machine included one extra byte for the end address. This results in failure to map other resources on physical address directly after the NOR flash.

Signed-off-by: Yoav Steinberg &lt;yoav@monfort.co.il&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>[ARM] 3739/1: genirq updates:  irq_chip, add and use irq_chip.name</title>
<updated>2006-08-01T21:26:25Z</updated>
<author>
<name>David Brownell</name>
</author>
<published>2006-08-01T21:26:25Z</published>
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<id>urn:sha1:38c677cb9a683c9d477f845484b74b0a1b23e1fb</id>
<content type='text'>
Patch from David Brownell

ARM genirq cleanups/updates:

    - Start switching platforms to newer APIs
        * use "irq_chip" name, not "irqchip"
        * providing irq_chip.name

    - Show irq_chip.name in /proc/interrupts, like on x86.

This update a bit more than half of the ARM code.  The irq_chip.name
values were chosen to match docs (if I have them) or be otherwise
obvious ("FPGA", "CPLD", or matching the code).

Signed-off-by: David Brownell &lt;dbrownell@users.sourceforge.net&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>[ARM] Allow Versatile to be built for AB and PB</title>
<updated>2006-07-11T20:10:42Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2006-07-10T15:33:54Z</published>
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<id>urn:sha1:dc5bc8f1e96c32f28bddf32a14ef9251fb3071d0</id>
<content type='text'>
If a configuration was chosen to support both the Versatile
AB and PB boards, the result would write to registers not
available on the PB version of the board.  Resolve this by
using machine_is_xxx().

Also, for the CLCD, despite how the code looks, both the AB
and PB access the same location to control the clock rate -
it's just called something different between the two board
versions.  Invent our own name for this location and use it
unconditionally.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>[PATCH] ARM: fixup irqflags breakage after ARM genirq merge</title>
<updated>2006-07-03T00:29:22Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2006-07-03T00:20:05Z</published>
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<id>urn:sha1:52e405eaa9806968e88b35d65e57acad954a5ab5</id>
<content type='text'>
The irgflags consolidation did conflict with the ARM to generic IRQ
conversion and was not applied for ARM. Fix it up.

Use the new IRQF_ constants and remove the SA_INTERRUPT define

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@osdl.org&gt;
</content>
</entry>
<entry>
<title>Remove obsolete #include &lt;linux/config.h&gt;</title>
<updated>2006-06-30T17:25:36Z</updated>
<author>
<name>Jörn Engel</name>
</author>
<published>2006-06-30T17:25:36Z</published>
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<id>urn:sha1:6ab3d5624e172c553004ecc862bfeac16d9d68b7</id>
<content type='text'>
Signed-off-by: Jörn Engel &lt;joern@wohnheim.fh-wedel.de&gt;
Signed-off-by: Adrian Bunk &lt;bunk@stusta.de&gt;
</content>
</entry>
<entry>
<title>[ARM] Fix Integrator and Versatile interrupt initialisation</title>
<updated>2006-06-10T11:42:12Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2006-06-10T11:42:12Z</published>
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<id>urn:sha1:56f1319e877a969b814b3805c77ea9c31d849f54</id>
<content type='text'>
Both Integrator and Versatile were using set_irq_handler() and
enable_irq(), and working around the initialisation of the
chained interrupt, instead of the more correct
set_irq_chained_handler() function.  Fix Integrator and
Versatile to use the right function, and remove these work-arounds.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>[ARM] Adapt vic.c to allow for multiple VICs in a system.</title>
<updated>2006-03-21T22:05:52Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2006-03-15T15:44:29Z</published>
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<id>urn:sha1:824b5b5e59472c89bc508afa5c453547c91ed53b</id>
<content type='text'>
Some SoCs have multiple VIC devices.  Adapt the generic vic code
to allow multiple implementations to be handled.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
</feed>
