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<title>kernel.git/arch/arm/mach-msm/timer.c, branch linux-3.2.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.2.y</id>
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<updated>2011-10-23T12:32:33Z</updated>
<entry>
<title>ARM: gic, local timers: use the request_percpu_irq() interface</title>
<updated>2011-10-23T12:32:33Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2011-07-22T11:52:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=28af690a284dfcb627bd69d0963db1c0f412cb8c'/>
<id>urn:sha1:28af690a284dfcb627bd69d0963db1c0f412cb8c</id>
<content type='text'>
This patch remove the hardcoded link between local timers and PPIs,
and convert the PPI users (TWD, MCT and MSM timers) to the new
*_percpu_irq interface. Also some collateral cleanup
(local_timer_ack() is gone, and the interrupt handler is strictly
private to each driver).

PPIs are now useable for more than just the local timers.

Additional testing by David Brown (msm8250 and msm8660) and
Shawn Guo (imx6q).

Cc: David Brown &lt;davidb@codeaurora.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: David Brown &lt;davidb@codeaurora.org&gt;
Tested-by: David Brown &lt;davidb@codeaurora.org&gt;
Tested-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>msm: timer: Fix DGT rate on 8960 and 8660</title>
<updated>2011-06-20T23:30:07Z</updated>
<author>
<name>Stephen Boyd</name>
</author>
<published>2011-04-21T23:09:11Z</published>
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<id>urn:sha1:fdb9c3cd5124c9a6e4c824ed2bca5b4602e84a1a</id>
<content type='text'>
The DGT runs at 27 MHz divided by 4 on 8660 and 8960.

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: David Brown &lt;davidb@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>msm: timer: compensate for timer shift in msm_read_timer_count</title>
<updated>2011-06-17T21:54:18Z</updated>
<author>
<name>Jeff Ohlstein</name>
</author>
<published>2011-06-17T20:55:38Z</published>
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<id>urn:sha1:650f156775c2638cc02ed7df31186a09ba79666a</id>
<content type='text'>
Some msm targets have timers whose lower bits are unreliable. So, we
present our timers as lower frequency than they actually are, and ignore
the bottom 5 bits on such targets. This compensation was erroneously
removed from the msm_read_timer_count function, so restore it.

This was broken by 94790ec25 "msm: timer: SMP timer support for msm".

Signed-off-by: Jeff Ohlstein &lt;johlstei@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>msm: timer: Fix SMP build error</title>
<updated>2011-05-31T23:33:50Z</updated>
<author>
<name>Stephen Boyd</name>
</author>
<published>2011-05-31T23:10:00Z</published>
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<id>urn:sha1:ebf30dc91cc8592cd72b004219cfc276b3ad2854</id>
<content type='text'>
Fix build breakage on SMP=y builds due to 0f7b332 (ARM:
consolidate SMP cross call implementation, 2011-04-03)

arch/arm/mach-msm/timer.c: In function 'local_timer_setup':
arch/arm/mach-msm/timer.c:295: error: implicit declaration of
function 'gic_enable_ppi'

Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: David Brown &lt;davidb@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>msm: timer: fix missing return value</title>
<updated>2011-03-31T20:15:40Z</updated>
<author>
<name>David Brown</name>
</author>
<published>2011-03-30T18:26:57Z</published>
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<id>urn:sha1:893b66c39da812e7dd0d7b32aa0633e5d90d950c</id>
<content type='text'>
Change af90f10d38 "ARM: 6759/1: smp: Select local timers vs broadcast
timer support runtime" missed a return statement, causing a compile
warning:

  arch/arm/mach-msm/timer.c:272: warning: 'return' with no value, in
  function returning non-void

Trivially return 0 for success when running on cpu 0 (to match the
comment and previous behavior).

Signed-off-by: David Brown &lt;davidb@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm</title>
<updated>2011-03-24T03:37:26Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2011-03-24T03:37:26Z</published>
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<id>urn:sha1:2f284c846331fa44be1300a3c2c3e85800268a00</id>
<content type='text'>
* 'devel' of master.kernel.org:/home/rmk/linux-2.6-arm: (35 commits)
  ARM: Update (and cut down) mach-types
  ARM: 6771/1: vexpress: add support for multiple core tiles
  ARM: 6797/1: hw_breakpoint: Fix newlines in WARNings
  ARM: 6751/1: vexpress: select applicable errata workarounds in Kconfig
  ARM: 6753/1: omap4: Enable ARM local timers with OMAP4430 es1.0 exception
  ARM: 6759/1: smp: Select local timers vs broadcast timer support runtime
  ARM: pgtable: add pud-level code
  ARM: 6673/1: LPAE: use phys_addr_t instead of unsigned long for start of membanks
  ARM: Use long long format when printing meminfo physical addresses
  ARM: integrator: add Integrator/CP sched_clock support
  ARM: realview/vexpress: consolidate SMP bringup code
  ARM: realview/vexpress: consolidate localtimer support
  ARM: integrator/versatile: consolidate FPGA IRQ handling code
  ARM: rationalize versatile family Kconfig/Makefile
  ARM: realview: remove old AMBA device DMA definitions
  ARM: versatile: remove old AMBA device DMA definitions
  ARM: vexpress: use new init_early for clock tree and sched_clock init
  ARM: realview: use new init_early for clock tree and sched_clock init
  ARM: versatile: use new init_early for clock tree and sched_clock init
  ARM: integrator: use new init_early for clock tree init
  ...
</content>
</entry>
<entry>
<title>ARM: 6759/1: smp: Select local timers vs broadcast timer support runtime</title>
<updated>2011-02-23T17:54:27Z</updated>
<author>
<name>Santosh Shilimkar</name>
</author>
<published>2011-02-23T17:53:15Z</published>
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<id>urn:sha1:af90f10d3826525306c96d423df240210640cb72</id>
<content type='text'>
The current code support of dummy timers in absence of local
timer is compile time. This is an attempt to convert it to runtime
so that on few SOC version if the local timers aren't supported
kernel can switch to dummy timers. OMAP4430 ES1.0 does suffer from
this limitation.

This patch should not have any functional impact on affected
files.

Cc: Daniel Walker &lt;dwalker@codeaurora.org&gt;
Cc: Bryan Huntsman &lt;bryanh@codeaurora.org&gt;
Cc: Tony Lindgren &lt;tony@atomide.com&gt;
Cc: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Cc: Paul Mundt &lt;lethal@linux-sh.org&gt;
Cc: Magnus Damm &lt;magnus.damm@gmail.com&gt;
Cc: Colin Cross &lt;ccross@android.com&gt;
Cc: Erik Gilling &lt;konkers@android.com&gt;
Cc: Srinidhi Kasagar &lt;srinidhi.kasagar@stericsson.com&gt;
Cc: Linus Walleij &lt;linus.walleij@stericsson.com&gt;
Signed-off-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Acked-by: David Brown &lt;davidb@codeaurora.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>msm: timer: Timer support for MSM8960</title>
<updated>2011-01-21T23:27:54Z</updated>
<author>
<name>Stepan Moskovchenko</name>
</author>
<published>2010-12-02T03:25:14Z</published>
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<id>urn:sha1:a81c8c38ed06c5f59d62a2257d21ed02d2af38fe</id>
<content type='text'>
Modify the macros in the MSM timer driver to support the
MSM8960 chip.

Signed-off-by: Stepan Moskovchenko &lt;stepanm@codeaurora.org&gt;
Signed-off-by: David Brown &lt;davidb@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>msm: Generalize timer register mappings</title>
<updated>2011-01-21T23:27:50Z</updated>
<author>
<name>David Brown</name>
</author>
<published>2011-01-07T18:20:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8c27e6f305242ffab0c88eed5dea8394b8ce86d0'/>
<id>urn:sha1:8c27e6f305242ffab0c88eed5dea8394b8ce86d0</id>
<content type='text'>
Allow the timer register to be determined dynamically instead of at
compile time.  Use common virtual addresses for the registers across
all MSM chips, and select the register mappings based on the detected
CPU.

Signed-off-by: David Brown &lt;davidb@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>msm: timer: SMP timer support for msm</title>
<updated>2011-01-07T23:54:44Z</updated>
<author>
<name>Jeff Ohlstein</name>
</author>
<published>2010-12-02T20:05:12Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=94790ec25fdd51dc4126cc176f2e104f80f87fcb'/>
<id>urn:sha1:94790ec25fdd51dc4126cc176f2e104f80f87fcb</id>
<content type='text'>
The msm provides timer hardware that is private to each core. Each
timer has separate counter and match registers, so we create separate
clock_event_devices for each core. For the global clocksource, use
cpu 0's counter.

Signed-off-by: Jeff Ohlstein &lt;johlstei@codeaurora.org&gt;
Signed-off-by: David Brown &lt;davidb@codeaurora.org&gt;
</content>
</entry>
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