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<title>kernel.git/arch/arm/kvm/hyp, branch linux-4.10.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.10.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.10.y'/>
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<updated>2016-11-04T17:56:28Z</updated>
<entry>
<title>arm/arm64: KVM: Perform local TLB invalidation when multiplexing vcpus on a single CPU</title>
<updated>2016-11-04T17:56:28Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2016-10-18T17:37:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=94d0e5980d6791b9f98a9b6c586c1f7cb76b2178'/>
<id>urn:sha1:94d0e5980d6791b9f98a9b6c586c1f7cb76b2178</id>
<content type='text'>
Architecturally, TLBs are private to the (physical) CPU they're
associated with. But when multiple vcpus from the same VM are
being multiplexed on the same CPU, the TLBs are not private
to the vcpus (and are actually shared across the VMID).

Let's consider the following scenario:

- vcpu-0 maps PA to VA
- vcpu-1 maps PA' to VA

If run on the same physical CPU, vcpu-1 can hit TLB entries generated
by vcpu-0 accesses, and access the wrong physical page.

The solution to this is to keep a per-VM map of which vcpu ran last
on each given physical CPU, and invalidate local TLBs when switching
to a different vcpu from the same VM.

Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: KVM: Support vgic-v3</title>
<updated>2016-09-22T11:22:21Z</updated>
<author>
<name>Vladimir Murzin</name>
</author>
<published>2016-09-12T14:49:24Z</published>
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<id>urn:sha1:acda5430bee4621f218391d0bcfbe4412adb3554</id>
<content type='text'>
This patch allows to build and use vgic-v3 in 32-bit mode.

Unfortunately, it can not be split in several steps without extra
stubs to keep patches independent and bisectable.  For instance,
virt/kvm/arm/vgic/vgic-v3.c uses function from vgic-v3-sr.c, handling
access to GICv3 cpu interface from the guest requires vgic_v3.vgic_sre
to be already defined.

It is how support has been done:

* handle SGI requests from the guest

* report configured SRE on access to GICv3 cpu interface from the guest

* required vgic-v3 macros are provided via uapi.h

* static keys are used to select GIC backend

* to make vgic-v3 build KVM_ARM_VGIC_V3 guard is removed along with
  the static inlines

Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Vladimir Murzin &lt;vladimir.murzin@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm: KVM: Handle async aborts delivered while at HYP</title>
<updated>2016-09-08T10:53:00Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2016-09-06T13:02:12Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c39798f471259dacf56df6bfb2bd071dfe074486'/>
<id>urn:sha1:c39798f471259dacf56df6bfb2bd071dfe074486</id>
<content type='text'>
Just like for arm64, we can handle asynchronous aborts being
delivered at HYP while being caused by the guest. We use
the exact same method to catch such an abort, and soldier on.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>arm: KVM: Preserve pending Virtual Abort in world switch</title>
<updated>2016-09-08T10:53:00Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2016-09-06T13:02:08Z</published>
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<id>urn:sha1:1f7e378d1235a3cb5c9cdd8c62fe13cb6c3cf157</id>
<content type='text'>
The HCR.VA bit is used to signal an Abort to a guest, and has
the peculiar feature of getting cleared when the guest has taken
the abort (this is the only bit that behaves as such in this register).

This means that if we signal such an abort, we must leave it in
the guest context until it disappears from HCR, and at which point
it must be cleared from the context.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: arm/arm64: Get rid of exported aliases to static functions</title>
<updated>2016-09-08T10:53:00Z</updated>
<author>
<name>Christoffer Dall</name>
</author>
<published>2016-09-01T11:16:03Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=cf0ba18a441410aeaf3ef97eead3a3fa5381f46f'/>
<id>urn:sha1:cf0ba18a441410aeaf3ef97eead3a3fa5381f46f</id>
<content type='text'>
When rewriting the assembly code to C code, it was useful to have
exported aliases or static functions so that we could keep the existing
common C code unmodified and at the same time rewrite arm64 from
assembly to C code, and later do the arm part.

Now when both are done, we really don't need this level of indirection
anymore, and it's time to save a few lines and brain cells.

Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
</content>
</entry>
<entry>
<title>ARM: KVM: Use common version of timer-sr.c</title>
<updated>2016-02-29T18:34:19Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2016-01-28T14:48:42Z</published>
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<id>urn:sha1:68130cb5db09cb8a285a59f70ac72d2bfa8685fd</id>
<content type='text'>
Using the common HYP timer code is a bit more tricky, since we
use system register names. Nothing a set of macros cannot
work around...

Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: KVM: Use common version of vgic-v2-sr.c</title>
<updated>2016-02-29T18:34:19Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2016-01-28T14:33:05Z</published>
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<id>urn:sha1:b5fa5d3e628bd301b89937ee4f7814297d8e2e31</id>
<content type='text'>
No need to keep our own private version, the common one is
strictly identical.

Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: KVM: Move kvm/hyp/hyp.h to include/asm/kvm_hyp.h</title>
<updated>2016-02-29T18:34:18Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2016-01-28T14:31:37Z</published>
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<id>urn:sha1:f1c9cad7c508f59fedd9f77eb36e5859e11ce5ab</id>
<content type='text'>
In order to be able to use the code located in virt/kvm/arm/hyp,
we need to make the global hyp.h file accessible from include/asm,
similar to what we did for arm64.

Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: KVM: Remove __weak attributes</title>
<updated>2016-02-29T18:34:15Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2016-01-06T09:32:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fa85e25dad0f3f4e7ff2c58a914dcfe53210f680'/>
<id>urn:sha1:fa85e25dad0f3f4e7ff2c58a914dcfe53210f680</id>
<content type='text'>
Now that the old code is long gone, we can remove all the weak
attributes, as there is only one version of the code.

Acked-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: KVM: Switch to C-based stage2 init</title>
<updated>2016-02-29T18:34:14Z</updated>
<author>
<name>Marc Zyngier</name>
</author>
<published>2016-02-01T19:56:31Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d4c7688c51e57be20ca5f3dffa4c8771888a42fc'/>
<id>urn:sha1:d4c7688c51e57be20ca5f3dffa4c8771888a42fc</id>
<content type='text'>
As we now have hooks to setup VTCR from C code, let's drop the
original VTCR setup and reimplement it as part of the HYP code.

Reviewed-by: Christoffer Dall &lt;christoffer.dall@linaro.org&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
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