<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/arm/kernel/smp.c, branch linux-2.6.37.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.37.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-2.6.37.y'/>
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<updated>2010-12-18T13:57:00Z</updated>
<entry>
<title>ARM: smp: avoid incrementing mm_users on CPU startup</title>
<updated>2010-12-18T13:57:00Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2010-12-18T13:57:00Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1ae1b5f053cf36bd0f913e83f3b136fec8152d4d'/>
<id>urn:sha1:1ae1b5f053cf36bd0f913e83f3b136fec8152d4d</id>
<content type='text'>
We should not be incrementing mm_users when we startup a secondary
CPU - doing so results in mm_users incrementing by one each time we
hotplug a CPU, which will eventually wrap, and will cause problems.

Other architectures such as x86 do not increment mm_users, but only
mm_count, so we follow that pattern.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>Merge branch 'hotplug' into devel</title>
<updated>2010-10-18T21:34:47Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2010-10-18T21:34:47Z</published>
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<id>urn:sha1:a0a55682b83fd5f012afadcf415b030d7424ae68</id>
<content type='text'>
Conflicts:
	arch/arm/kernel/head-common.S
</content>
</entry>
<entry>
<title>ARM: hotplug cpu: setup 1:1 map for entire kernel image for secondary CPUs</title>
<updated>2010-10-08T09:07:32Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2010-10-01T14:38:24Z</published>
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<id>urn:sha1:37b05b63754e995b8cb76f4fbe7ed7219b3ca896</id>
<content type='text'>
Make the entire kernel image available for secondary CPUs rather
than just the first MB of memory.  This allows the startup code
to appear in the cpuinit sections.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 6402/1: Don't send IPI in smp_send_stop if there's only one CPU</title>
<updated>2010-10-04T19:23:36Z</updated>
<author>
<name>Tony Lindgren</name>
</author>
<published>2010-09-20T23:43:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f9e417e901e891d139f4d5fd750959e4a862d9f7'/>
<id>urn:sha1:f9e417e901e891d139f4d5fd750959e4a862d9f7</id>
<content type='text'>
No need to send IPI if there's one CPU, especially when booting
systems with CONFIG_SMP_ON_UP that may not even support IPI.

Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: call machine_shutdown() from machine_halt(), etc</title>
<updated>2010-07-27T09:48:43Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2010-07-26T12:31:27Z</published>
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<id>urn:sha1:3d3f78d752bfada5b6041f2f7bd0833d8bdf7a4a</id>
<content type='text'>
x86 calls machine_shutdown() from the various machine_*() calls which
take the machine down ready for halting, restarting, etc, and uses
this to bring the system safely to a point where those actions can be
performed.  Such actions are stopping the secondary CPUs.

So, change the ARM implementation of these to reflect what x86 does.

This solves kexec problems on ARM SMP platforms, where the secondary
CPUs were left running across the kexec call.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: SMP: Always enable clock event broadcast support</title>
<updated>2010-07-27T09:48:42Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2010-07-26T12:19:43Z</published>
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<id>urn:sha1:5388a6b266e9c3357353332ba0cd5549082887f1</id>
<content type='text'>
The TWD local timers are unable to wake up the CPU when it is placed
into a low power mode, eg. C3.  Therefore, we need to adapt things
such that the TWD code can cope with this.

We do this by always providing a broadcast tick function, and marking
the fact that the TWD local timer will stop in low power modes.  This
means that when the CPU is placed into a low power mode, the core
timer code marks this fact, and allows an IPI to be given to the core.

Tested-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>Merge branch 'devel-stable' into devel</title>
<updated>2010-05-17T16:24:04Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2010-05-17T16:24:04Z</published>
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<id>urn:sha1:ac1d426e825ab5778995f2f6f053ca2e6b45c622</id>
<content type='text'>
Conflicts:
	arch/arm/Kconfig
	arch/arm/include/asm/system.h
	arch/arm/mm/Kconfig
</content>
</entry>
<entry>
<title>ARM: rename mach_cpu_disable() to platform_cpu_disable()</title>
<updated>2010-05-15T14:03:51Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2010-05-15T09:18:05Z</published>
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<id>urn:sha1:8e2a43f5f5e1255879064924917fb1a6e5be7cb3</id>
<content type='text'>
Consistently name all SMP platform related functions.

Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 6066/1: Fix "BUG: scheduling while atomic: swapper/0/0x00000002</title>
<updated>2010-05-01T10:32:57Z</updated>
<author>
<name>Santosh Shilimkar</name>
</author>
<published>2010-04-30T05:51:20Z</published>
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<id>urn:sha1:13ea9cc82138691856d7cd855dff9aef1479adb9</id>
<content type='text'>
This patch fixes the preempt leak in the cpuidle path invoked from
cpu-hotplug. The fix is suggested by Russell King and is based
on x86 idea of calling init_idle() on the idle task when it's
re-used which also resets the preempt count amongst other things

dump:
BUG: scheduling while atomic: swapper/0/0x00000002
Modules linked in:
Backtrace:
[&lt;c0024f90&gt;] (dump_backtrace+0x0/0x110) from [&lt;c0173bc4&gt;] (dump_stack+0x18/0x1c)
 r7:c02149e4 r6:c033df00 r5:c7836000 r4:00000000
[&lt;c0173bac&gt;] (dump_stack+0x0/0x1c) from [&lt;c003b4f0&gt;] (__schedule_bug+0x60/0x70)
[&lt;c003b490&gt;] (__schedule_bug+0x0/0x70) from [&lt;c0174214&gt;] (schedule+0x98/0x7b8)
 r5:c7836000 r4:c7836000
[&lt;c017417c&gt;] (schedule+0x0/0x7b8) from [&lt;c00228c4&gt;] (cpu_idle+0xb4/0xd4)
# [&lt;c0022810&gt;] (cpu_idle+0x0/0xd4) from [&lt;c0171dd8&gt;] (secondary_start_kernel+0xe0/0xf0)
 r5:c7836000 r4:c0205f40
[&lt;c0171cf8&gt;] (secondary_start_kernel+0x0/0xf0) from [&lt;c002d57c&gt;] (prm_rmw_mod_reg_bits+0x88/0xa4)
 r7:c02149e4 r6:00000001 r5:00000001 r4:c7836000
Backtrace aborted due to bad frame pointer &lt;c7837fbc&gt;

Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Signed-off-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: Add L2 cache handling to smp boot support</title>
<updated>2010-03-14T19:42:35Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2010-02-12T14:36:24Z</published>
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<id>urn:sha1:1027247f6eb727db6c600b9eb02796f0766ae704</id>
<content type='text'>
The page table and secondary data which we're asking the secondary CPU
to make use of has to hit RAM to ensure that the secondary CPU can see
it since it may not be taking part in coherency or cache searches at
this point.

Acked-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
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