<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/arch/arm/include/asm/thread_info.h, branch linux-3.19.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.19.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.19.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2014-12-05T16:30:47Z</updated>
<entry>
<title>Merge branches 'fixes', 'misc', 'pm' and 'sa1100' into for-next</title>
<updated>2014-12-05T16:30:47Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2014-12-05T16:30:47Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fbe4dd088f449cbae586aa8af51d271297c75f9f'/>
<id>urn:sha1:fbe4dd088f449cbae586aa8af51d271297c75f9f</id>
<content type='text'>
</content>
</entry>
<entry>
<title>ARM: 8226/1: cacheflush: get rid of restarting block</title>
<updated>2014-11-27T15:55:35Z</updated>
<author>
<name>Vladimir Murzin</name>
</author>
<published>2014-11-27T10:39:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3f4aa45ceea5789a4aade536acc27f2e0d3da5e1'/>
<id>urn:sha1:3f4aa45ceea5789a4aade536acc27f2e0d3da5e1</id>
<content type='text'>
We cannot restart cacheflush safely if a process provides user-defined
signal handler and signal is pending. In this case -EINTR is returned
and it is expected that process re-invokes syscall. However, there are
a few problems with that:
 * looks like nobody bothers checking return value from cacheflush
 * but if it did, we don't provide the restart address for that, so the
   process has to use the same range again
 * ...and again, what might lead to looping forever

So, remove cacheflush restarting code and terminate cache flushing
as early as fatal signal is pending.

Cc: stable@vger.kernel.org # 3.12+
Reported-by: Chanho Min &lt;chanho.min@lge.com&gt;
Signed-off-by: Vladimir Murzin &lt;vladimir.murzin@arm.com&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 8173/1: Calculate current_thread_info from current_stack_pointer</title>
<updated>2014-11-13T23:58:04Z</updated>
<author>
<name>Behan Webster</name>
</author>
<published>2014-09-26T23:31:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f6c9cbf091a4b0769180d663e37621569b054d11'/>
<id>urn:sha1:f6c9cbf091a4b0769180d663e37621569b054d11</id>
<content type='text'>
Use the global current_stack_pointer to get the value of the stack pointer.
This change supports being able to compile the kernel with both gcc and clang.

Signed-off-by: Behan Webster &lt;behanw@converseincode.com&gt;
Reviewed-by: Mark Charlebois &lt;charlebm@gmail.com&gt;
Reviewed-by: Jan-Simon Möller &lt;dl9pf@gmx.de&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 8170/1: Add global named register current_stack_pointer for ARM</title>
<updated>2014-11-13T23:58:00Z</updated>
<author>
<name>Behan Webster</name>
</author>
<published>2014-09-26T23:31:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0abc08baf2ddf61a37d375a9fb832be612f9c5a5'/>
<id>urn:sha1:0abc08baf2ddf61a37d375a9fb832be612f9c5a5</id>
<content type='text'>
Define a global named register for current_stack_pointer. The use of this new
variable guarantees that both gcc and clang can access this register in C code.

Signed-off-by: Behan Webster &lt;behanw@converseincode.com&gt;
Reviewed-by: Jan-Simon Möller &lt;dl9pf@gmx.de&gt;
Reviewed-by: Mark Charlebois &lt;charlebm@gmail.com&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 8078/1: get rid of hardcoded assumptions about kernel stack size</title>
<updated>2014-07-01T14:05:47Z</updated>
<author>
<name>Andrey Ryabinin</name>
</author>
<published>2014-06-18T15:12:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=9a2b51b6ca93fc42e5676aa444c956f7506185db'/>
<id>urn:sha1:9a2b51b6ca93fc42e5676aa444c956f7506185db</id>
<content type='text'>
Changing kernel stack size on arm is not as simple as it should be:
1) THREAD_SIZE macro doesn't respect PAGE_SIZE and THREAD_SIZE_ORDER
2) stack size is hardcoded in get_thread_info macro

This patch fixes it by calculating THREAD_SIZE and thread_info address
taking into account PAGE_SIZE and THREAD_SIZE_ORDER.

Now changing stack size becomes simply changing THREAD_SIZE_ORDER.

Signed-off-by: Andrey Ryabinin &lt;a.ryabinin@samsung.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 8069/1: Make thread_save_fp macro aware of THUMB2 mode</title>
<updated>2014-06-17T13:47:36Z</updated>
<author>
<name>Nikolay Borisov</name>
</author>
<published>2014-06-03T18:47:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=870cbe8cb2043d63dc5f110731df57599075f53d'/>
<id>urn:sha1:870cbe8cb2043d63dc5f110731df57599075f53d</id>
<content type='text'>
The thread_save_fp macro has been defined so that it always reads the fp member
of the cpu_context_save struct. However, in the case of THUMB2 the fp is saved
not in the fp (r11) member but rather in r7.

This patch changes the way the macro is defined such that FP is read from the
correct place depending on whether we are a THUMB2 kernel or not. This enables
the backtrace in sitaution such as "echo t &gt; /proc/sysrq-trigger" or the
function in which a process sleeping when "ps -Al" is invoked.

Signed-off-by: Nikolay Borisov &lt;Nikolay.Borisov@arm.com&gt;
Reviewed-by: Anurag Aggarwal &lt;anurag19aggarwal@gmail.com&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: add uprobes support</title>
<updated>2014-03-18T20:39:40Z</updated>
<author>
<name>David A. Long</name>
</author>
<published>2014-03-07T16:23:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c7edc9e326d53ca5ef9bed82de0740c6b107d55b'/>
<id>urn:sha1:c7edc9e326d53ca5ef9bed82de0740c6b107d55b</id>
<content type='text'>
Using Rabin Vincent's ARM uprobes patches as a base, enable uprobes
support on ARM.

Caveats:

 - Thumb is not supported

Signed-off-by: Rabin Vincent &lt;rabin@rab.in&gt;
Signed-off-by: David A. Long &lt;dave.long@linaro.org&gt;
</content>
</entry>
<entry>
<title>preempt: Make PREEMPT_ACTIVE generic</title>
<updated>2013-11-13T19:21:47Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2013-09-17T18:53:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=00d1a39e69d5afa7523dad515a05b21abd17c389'/>
<id>urn:sha1:00d1a39e69d5afa7523dad515a05b21abd17c389</id>
<content type='text'>
No point in having this bit defined by architecture.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Link: http://lkml.kernel.org/r/20130917183629.090698799@linutronix.de
</content>
</entry>
<entry>
<title>Merge branch 'for-rmk/cacheflush-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable</title>
<updated>2013-08-28T17:38:40Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2013-08-28T17:38:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=5cc91e0460889c8461620904968e193dddb1beb3'/>
<id>urn:sha1:5cc91e0460889c8461620904968e193dddb1beb3</id>
<content type='text'>
</content>
</entry>
<entry>
<title>ARM: cacheflush: split user cache-flushing into interruptible chunks</title>
<updated>2013-08-20T10:54:53Z</updated>
<author>
<name>Will Deacon</name>
</author>
<published>2013-05-13T14:21:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=28256d612726a28a8b9d3c49f2b74198c4423d6a'/>
<id>urn:sha1:28256d612726a28a8b9d3c49f2b74198c4423d6a</id>
<content type='text'>
Flushing a large, non-faulting VMA from userspace can potentially result
in a long time spent flushing the cache line-by-line without preemption
occurring (in the case of CONFIG_PREEMPT=n).

Whilst this doesn't affect the stability of the system, it can certainly
affect the responsiveness and CPU availability for other tasks.

This patch splits up the user cacheflush code so that it flushes in
chunks of a page. After each chunk has been flushed, we may reschedule
if appropriate and, before processing the next chunk, we allow any
pending signals to be handled before resuming from where we left off.

Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
</feed>
