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<title>kernel.git/arch/arm/include/asm/thread_info.h, branch linux-3.17.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.17.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.17.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2014-12-06T23:57:29Z</updated>
<entry>
<title>ARM: 8226/1: cacheflush: get rid of restarting block</title>
<updated>2014-12-06T23:57:29Z</updated>
<author>
<name>Vladimir Murzin</name>
</author>
<published>2014-11-27T10:39:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c4c2506f41c9c061e4a7e9b2e02ed0377ddfed14'/>
<id>urn:sha1:c4c2506f41c9c061e4a7e9b2e02ed0377ddfed14</id>
<content type='text'>
commit 3f4aa45ceea5789a4aade536acc27f2e0d3da5e1 upstream.

We cannot restart cacheflush safely if a process provides user-defined
signal handler and signal is pending. In this case -EINTR is returned
and it is expected that process re-invokes syscall. However, there are
a few problems with that:
 * looks like nobody bothers checking return value from cacheflush
 * but if it did, we don't provide the restart address for that, so the
   process has to use the same range again
 * ...and again, what might lead to looping forever

So, remove cacheflush restarting code and terminate cache flushing
as early as fatal signal is pending.

Reported-by: Chanho Min &lt;chanho.min@lge.com&gt;
Signed-off-by: Vladimir Murzin &lt;vladimir.murzin@arm.com&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>ARM: 8078/1: get rid of hardcoded assumptions about kernel stack size</title>
<updated>2014-07-01T14:05:47Z</updated>
<author>
<name>Andrey Ryabinin</name>
</author>
<published>2014-06-18T15:12:40Z</published>
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<id>urn:sha1:9a2b51b6ca93fc42e5676aa444c956f7506185db</id>
<content type='text'>
Changing kernel stack size on arm is not as simple as it should be:
1) THREAD_SIZE macro doesn't respect PAGE_SIZE and THREAD_SIZE_ORDER
2) stack size is hardcoded in get_thread_info macro

This patch fixes it by calculating THREAD_SIZE and thread_info address
taking into account PAGE_SIZE and THREAD_SIZE_ORDER.

Now changing stack size becomes simply changing THREAD_SIZE_ORDER.

Signed-off-by: Andrey Ryabinin &lt;a.ryabinin@samsung.com&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 8069/1: Make thread_save_fp macro aware of THUMB2 mode</title>
<updated>2014-06-17T13:47:36Z</updated>
<author>
<name>Nikolay Borisov</name>
</author>
<published>2014-06-03T18:47:14Z</published>
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<id>urn:sha1:870cbe8cb2043d63dc5f110731df57599075f53d</id>
<content type='text'>
The thread_save_fp macro has been defined so that it always reads the fp member
of the cpu_context_save struct. However, in the case of THUMB2 the fp is saved
not in the fp (r11) member but rather in r7.

This patch changes the way the macro is defined such that FP is read from the
correct place depending on whether we are a THUMB2 kernel or not. This enables
the backtrace in sitaution such as "echo t &gt; /proc/sysrq-trigger" or the
function in which a process sleeping when "ps -Al" is invoked.

Signed-off-by: Nikolay Borisov &lt;Nikolay.Borisov@arm.com&gt;
Reviewed-by: Anurag Aggarwal &lt;anurag19aggarwal@gmail.com&gt;
Acked-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: add uprobes support</title>
<updated>2014-03-18T20:39:40Z</updated>
<author>
<name>David A. Long</name>
</author>
<published>2014-03-07T16:23:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c7edc9e326d53ca5ef9bed82de0740c6b107d55b'/>
<id>urn:sha1:c7edc9e326d53ca5ef9bed82de0740c6b107d55b</id>
<content type='text'>
Using Rabin Vincent's ARM uprobes patches as a base, enable uprobes
support on ARM.

Caveats:

 - Thumb is not supported

Signed-off-by: Rabin Vincent &lt;rabin@rab.in&gt;
Signed-off-by: David A. Long &lt;dave.long@linaro.org&gt;
</content>
</entry>
<entry>
<title>preempt: Make PREEMPT_ACTIVE generic</title>
<updated>2013-11-13T19:21:47Z</updated>
<author>
<name>Thomas Gleixner</name>
</author>
<published>2013-09-17T18:53:09Z</published>
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<id>urn:sha1:00d1a39e69d5afa7523dad515a05b21abd17c389</id>
<content type='text'>
No point in having this bit defined by architecture.

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Peter Zijlstra &lt;peterz@infradead.org&gt;
Link: http://lkml.kernel.org/r/20130917183629.090698799@linutronix.de
</content>
</entry>
<entry>
<title>Merge branch 'for-rmk/cacheflush-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/will/linux into devel-stable</title>
<updated>2013-08-28T17:38:40Z</updated>
<author>
<name>Russell King</name>
</author>
<published>2013-08-28T17:38:40Z</published>
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<id>urn:sha1:5cc91e0460889c8461620904968e193dddb1beb3</id>
<content type='text'>
</content>
</entry>
<entry>
<title>ARM: cacheflush: split user cache-flushing into interruptible chunks</title>
<updated>2013-08-20T10:54:53Z</updated>
<author>
<name>Will Deacon</name>
</author>
<published>2013-05-13T14:21:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=28256d612726a28a8b9d3c49f2b74198c4423d6a'/>
<id>urn:sha1:28256d612726a28a8b9d3c49f2b74198c4423d6a</id>
<content type='text'>
Flushing a large, non-faulting VMA from userspace can potentially result
in a long time spent flushing the cache line-by-line without preemption
occurring (in the case of CONFIG_PREEMPT=n).

Whilst this doesn't affect the stability of the system, it can certainly
affect the responsiveness and CPU availability for other tasks.

This patch splits up the user cacheflush code so that it flushes in
chunks of a page. After each chunk has been flushed, we may reschedule
if appropriate and, before processing the next chunk, we allow any
pending signals to be handled before resuming from where we left off.

Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
</content>
</entry>
<entry>
<title>ARM: 7790/1: Fix deferred mm switch on VIVT processors</title>
<updated>2013-07-26T11:02:09Z</updated>
<author>
<name>Catalin Marinas</name>
</author>
<published>2013-07-23T15:15:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=bdae73cd374e28db544fdd9b77de689a36e3c129'/>
<id>urn:sha1:bdae73cd374e28db544fdd9b77de689a36e3c129</id>
<content type='text'>
As of commit b9d4d42ad9 (ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on
pre-ARMv6 CPUs), the mm switching on VIVT processors is done in the
finish_arch_post_lock_switch() function to avoid whole cache flushing
with interrupts disabled. The need for deferred mm switch is stored as a
thread flag (TIF_SWITCH_MM). However, with preemption enabled, we can
have another thread switch before finish_arch_post_lock_switch(). If the
new thread has the same mm as the previous 'next' thread, the scheduler
will not call switch_mm() and the TIF_SWITCH_MM flag won't be set for
the new thread.

This patch moves the switch pending flag to the mm_context_t structure
since this is specific to the mm rather than thread.

Signed-off-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Reported-by: Marc Kleine-Budde &lt;mkl@pengutronix.de&gt;
Tested-by: Marc Kleine-Budde &lt;mkl@pengutronix.de&gt;
Cc: &lt;stable@vger.kernel.org&gt; # 3.5+
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 7735/2: Preserve the user r/w register TPIDRURW on context switch and fork</title>
<updated>2013-06-24T14:21:59Z</updated>
<author>
<name>André Hentschel</name>
</author>
<published>2013-06-18T22:23:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a4780adeefd042482f624f5e0d577bf9cdcbb760'/>
<id>urn:sha1:a4780adeefd042482f624f5e0d577bf9cdcbb760</id>
<content type='text'>
Since commit 6a1c53124aa1 the user writeable TLS register was zeroed to
prevent it from being used as a covert channel between two tasks.

There are more and more applications coming to Windows RT,
Wine could support them, but mostly they expect to have
the thread environment block (TEB) in TPIDRURW.

This patch preserves that register per thread instead of clearing it.
Unlike the TPIDRURO, which is already switched, the TPIDRURW
can be updated from userspace so needs careful treatment in the case that we
modify TPIDRURW and call fork(). To avoid this we must always read
TPIDRURW in copy_thread.

Signed-off-by: André Hentschel &lt;nerv@dawncrow.de&gt;
Signed-off-by: Will Deacon &lt;will.deacon@arm.com&gt;
Signed-off-by: Jonathan Austin &lt;jonathan.austin@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 7688/1: add support for context tracking subsystem</title>
<updated>2013-04-03T16:00:01Z</updated>
<author>
<name>Kevin Hilman</name>
</author>
<published>2013-03-28T21:54:40Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=b00884802043d9102ecc2abfdc37a7b35b30e52a'/>
<id>urn:sha1:b00884802043d9102ecc2abfdc37a7b35b30e52a</id>
<content type='text'>
commit 91d1aa43 (context_tracking: New context tracking susbsystem)
generalized parts of the RCU userspace extended quiescent state into
the context tracking subsystem.  Context tracking is then used
to implement adaptive tickless (a.k.a extended nohz)

To support the new context tracking subsystem on ARM, the user/kernel
boundary transtions need to be instrumented.

For exceptions and IRQs in usermode, the existing usr_entry macro is
used to instrument the user-&gt;kernel transition.  For the return to
usermode path, the ret_to_user* path is instrumented.  Using the
usr_entry macro, this covers interrupts in userspace, data abort and
prefetch abort exceptions in userspace as well as undefined exceptions
in userspace (which is where FP emulation and VFP are handled.)

For syscalls, the slow return path is covered by instrumenting the
ret_to_user path.  In addition, the syscall entry point is
instrumented which covers the user-&gt;kernel transition for both fast
and slow syscalls, and an additional instrumentation point is added
for the fast syscall return path (ret_fast_syscall).

Cc: Mats Liljegren &lt;mats.liljegren@enea.com&gt;
Cc: Frederic Weisbecker &lt;fweisbec@gmail.com&gt;
Signed-off-by: Kevin Hilman &lt;khilman@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
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