Hosts the 0x221E linux distro kernel. https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.11.y 2013-08-13T19:22:44Z 2013-08-13T19:22:44Z Will Deacon 2013-08-12T17:04:05Z urn:sha1:00efaa0250939dc148e2d3104fb3c18395d24a2d Commit 15e7e5c1ebf5 ("ARM: 7749/1: spinlock: retry trylock operation if strex fails on free lock") modifying our arch_spin_trylock to retry the acquisition if the lock appeared uncontended, but the strex failed. This patch does the same for rwlocks, which were missed by the original patch. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2013-08-13T19:22:43Z Will Deacon 2013-08-12T17:03:26Z urn:sha1:afa31d8eb86fc2f25083e675d57ac8173a98f999 The res variable is written before we've finished with the input operands (namely the lock address), so ensure that we mark it as `early clobber' to avoid unintended register sharing. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2013-06-17T08:27:04Z Will Deacon 2013-06-05T10:27:26Z urn:sha1:15e7e5c1ebf556cd620c9b091e121091ac760f6d An exclusive store instruction may fail for reasons other than lock contention (e.g. a cache eviction during the critical section) so, in line with other architectures using similar exclusive instructions (alpha, mips, powerpc), retry the trylock operation if the lock appears to be free but the strex reported failure. Reported-by: Tony Thompson <anthony.thompson@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2013-01-28T14:13:05Z Will Deacon 2013-01-24T13:47:38Z urn:sha1:20e260b6f4f717c100620122f626a2c06a4cfd72 When unlocking a spinlock, all we need to do is increment the owner field of the lock. Since only one CPU can be performing an unlock() operation for a given lock, this doesn't need to be exclusive. This patch simplifies arch_spin_unlock to use non-exclusive accesses when updating the owner field of the lock. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2012-07-09T16:41:10Z Will Deacon 2012-07-06T14:44:13Z urn:sha1:881ccccb6bd3f0e1fff8b9addbe0de90e0b16166 The ARM arch_{read,write}_trylock implementations include unused backwards branch labels, since we don't retry the locking operation if the exclusive store fails. This patch removes the labels. Acked-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2012-07-09T16:41:10Z Will Deacon 2012-07-06T14:43:41Z urn:sha1:546c2896a42202dbc7d02f7c6ec9948ac1bf511b Ticket spinlocks ensure locking fairness by introducing a FIFO-like nature to the granting of lock acquisitions and also reducing the thundering herd effect when spinning on a lock by allowing the cacheline to remain in a shared state amongst the waiting CPUs. This is especially important on systems where memory-access times are not necessarily uniform when accessing the lock structure (for example, on a multi-cluster platform where the lock is allocated into L1 when a CPU releases it). This patch implements the ticket spinlock algorithm for ARM, replacing the simpler implementation for ARMv6+ processors. Reviewed-by: Nicolas Pitre <nico@linaro.org> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2011-05-23T16:19:26Z Marc Zyngier 2011-05-23T16:16:59Z urn:sha1:603605abae9ee731bdafb2af83a487d98a568815 ARM build fails with the following symptom: CC arch/arm/kernel/asm-offsets.s In file included from include/linux/seqlock.h:29, from include/linux/time.h:8, from include/linux/timex.h:56, from include/linux/sched.h:57, from arch/arm/kernel/asm-offsets.c:13: include/linux/spinlock.h: In function 'spin_unlock_wait': include/linux/spinlock.h:360: error: implicit declaration of function 'cpu_relax' make[1]: *** [arch/arm/kernel/asm-offsets.s] Error 1 Fix it by including <asm/processor.h>. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2011-02-10T15:30:51Z Dave Martin 2011-02-09T11:06:59Z urn:sha1:917692f5f7ec63de3b093c825913d68e910db282 The content for ALT_SMP() in the definition of WFE() expands to 6 bytes (IT cc ; WFEcc.W), which breaks the assumptions of the fixup code, leading to lockups when the affected code gets run. This patch works around the problem by explicitly using an IT + WFEcc.N pair. Signed-off-by: Dave Martin <dave.martin@linaro.org> Acked-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2011-02-02T21:23:25Z Russell King 2011-01-15T16:22:12Z urn:sha1:000d9c78eb5cd7f18e3d6a381d66e606bc9b8196 SMP requires at least the ARMv6K extensions to be present, so if we're running on SMP, the WFE and SEV instructions must be available. However, when we run on UP, the v6K extensions may not be available, and so we don't want WFE/SEV to be in the instruction stream. Use the SMP alternatives infrastructure to replace these instructions with NOPs if we build for SMP but run on UP. Tested-by: Tony Lindgren <tony@atomide.com> Tested-by: Sourav Poddar <sourav.poddar@ti.com> Tested-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> 2010-02-15T21:39:50Z Rabin Vincent 2010-01-25T18:43:03Z urn:sha1:c5113b61baf7a9a8616eca83e20847e7fecdc679 On ARMv7, the use of the cp15 operations for barriers is deprecated in favour of the isb, dsb, and dmb instructions. Change the locking functions to use the appropriate type of dsb for the architecture being built for. Signed-off-by: Rabin Vincent <rabin@rab.in> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>