Documentation: hwmon: coretemp: Update supported CPUs and TjMax values

2026-01-31T15:38:32Z

Update the coretemp documentation to reflect current driver capabilities: - Extend the supported CPU model list to include Atom processors from Bonnell through Jasper Lake, maintaining the original format with model numbers and adding X86_FEATURE_DTHERM as the actual detection mechanism. Added models: 0x37 (Bay Trail), 0x4a (Merrifield), 0x4c (Cherry Trail), 0x5a (Moorefield), 0x5c (Apollo Lake), 0x7a (Gemini Lake), 0x96 (Elkhart Lake), 0x9c (Jasper Lake) - Update the description to note that per-package temperature sensing is available on Sandy Bridge and all newer processors - Clarify that TjMax is read from MSR_IA32_TEMPERATURE_TARGET on modern CPUs (Nehalem and newer) - Add TjMax values for newer Atom processor families to Appendix A: - 22nm Silvermont/Bay Trail: E38xx at 110C, Z37xx at 90C - 22nm Silvermont/Moorefield: Z35xx at 90C - 14nm Airmont/Cherry Trail: Z8xxx at 90C - 14nm Goldmont/Apollo Lake: 105C - 14nm Goldmont Plus/Gemini Lake: 105C - 10nm Tremont/Elkhart Lake: 105C - 10nm Tremont/Jasper Lake: 105C TjMax values obtained from Intel ARK and official datasheets: - E3845: https://www.intel.com/content/www/us/en/products/sku/78475/intel-atom-processor-e3845-2m-cache-1-91-ghz/specifications.html - Z3600/Z3700: https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/atom-z36xxx-z37xxx-datasheet-vol-1.pdf Signed-off-by: Laveesh Bansal Link: https://lore.kernel.org/r/20260106155426.547872-2-laveeshb@laveeshbansal.com Signed-off-by: Guenter Roeck

docs: hwmon: Add an index file and rename docs to *.rst

2019-04-17T17:37:23Z

Now that all files were converted to ReST format, rename them and add an index. Signed-off-by: Mauro Carvalho Chehab Signed-off-by: Guenter Roeck

kernel.git/Documentation/hwmon/coretemp.rst, branch master

Documentation: hwmon: coretemp: Update supported CPUs and TjMax values

docs: hwmon: Add an index file and rename docs to *.rst