kernel.git/Documentation/devicetree/bindings/spi, branch linux-6.4.y

Merge tag 'spi-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

2023-04-27T18:02:26Z

Pull spi updates from Mark Brown: "A fairly standard release for SPI with the exception of a change to the API for specifying chip selects done in preparation for supporting devices with more than one chip select, this required some mechanical changes throughout the tree which have been cooking in -next happily for a while. There's also a new API to allow us to support TPM chips on half duplex controllers. Summary: - Refactoring in preparation for supporting multiple chip selects for a single device, needed by some flash devices, which required a change in the SPI device API visible throughout the tree - Support for hardware assisted interaction with SPI TPMs on half duplex controllers, implemented on nVidia Tedra210 QuadSPI - Optimisation for large transfers on fsl-cpm devices - Cleanups around device property use which fix some sisues with fwnode - Use of both void remove() and devm_platform_.*ioremap_resource() - Support for AMD Pensando Elba, Amlogic A1, Cadence device mode, Intel MetorLake-S and StarFive J7110 QuadSPI" * tag 'spi-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (185 commits) spi: bcm63xx: use macro DEFINE_SIMPLE_DEV_PM_OPS spi: tegra210-quad: Enable TPM wait polling spi: Add TPM HW flow flag spi: bcm63xx: remove PM_SLEEP based conditional compilation spi: cadence-quadspi: use macro DEFINE_SIMPLE_DEV_PM_OPS spi: spi-cadence: Add support for Slave mode spi: spi-cadence: Switch to spi_controller structure spi: cadence-quadspi: fix suspend-resume implementations spi: dw: Add support for AMD Pensando Elba SoC spi: dw: Add AMD Pensando Elba SoC SPI Controller spi: cadence-quadspi: Disable the SPI before reconfiguring spi: cadence-quadspi: Update the read timeout based on the length spi: spi-loopback-test: Add module param for iteration length spi: add support for Amlogic A1 SPI Flash Controller dt-bindings: spi: add Amlogic A1 SPI controller spi: fsl-spi: No need to check transfer length versus word size spi: fsl-spi: Change mspi_apply_cpu_mode_quirks() to void spi: fsl-cpm: Use 16 bit mode for large transfers with even size spi: fsl-spi: Re-organise transfer bits_per_word adaptation spi: fsl-spi: Fix CPM/QE mode Litte Endian ...

spi: dw: Add AMD Pensando Elba SoC SPI Controller

2023-04-17T17:18:10Z

The AMD Pensando Elba SoC has integrated the DW APB SPI Controller Signed-off-by: Brad Larson Reviewed-by: Krzysztof Kozlowski Reviewed-by: Serge Semin Link: https://lore.kernel.org/r/20230410184526.15990-5-blarson@amd.com Signed-off-by: Mark Brown

dt-bindings: spi: add Amlogic A1 SPI controller

2023-04-11T11:40:29Z

Add YAML devicetree Amlogic A1 (A113L SoC) SPIFC. Signed-off-by: Martin Kurbanov Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20230403183217.13280-2-mmkurbanov@sberdevices.ru Signed-off-by: Mark Brown

dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas

2023-04-05T20:38:38Z

Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present. Add unevaluatedProperties or additionalProperties as appropriate, and then add any missing properties flagged by the addition. Acked-by: Sebastian Reichel Acked-by: Guenter Roeck Acked-by: Greg Kroah-Hartman Acked-by: Mark Brown Acked-by: Lee Jones Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230124230228.372305-1-robh@kernel.org Signed-off-by: Rob Herring

spi: renesas,sh-msiof: Miscellaneous improvements

2023-03-20T13:11:44Z

Make "clocks" and "power-domains" required everywhere. Make "resets" required on R-Car Gen2 and newer (i.e. all but SH-Mobile). Update the example to match reality: - Use interrupt binding definitions instead of hardcoded numbers, - Convert to new-style CPG/MSSR bindings, - Add missing "power-domains" and "resets" properties. Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/052af97ecbaa9ba6e0d406883dd3389fa397579a.1678891999.git.geert+renesas@glider.be Signed-off-by: Mark Brown

dt-bindings: yamllint: Require a space after a comment '#'

2023-03-08T15:04:53Z

Enable yamllint to check the preferred commenting style of requiring a space after a comment character '#'. Fix the cases in the tree which have a warning with this enabled. Most cases just need a space after the '#'. A couple of cases with comments which were not intended to be comments are revealed. Those were in ti,sa2ul.yaml, ti,cal.yaml, and brcm,bcmgenet.yaml. Acked-by: Jakub Kicinski Acked-by: Mark Brown Reviewed-by: Dmitry Baryshkov # drm/msm Reviewed-by: Conor Dooley Reviewed-by: Stephen Boyd Link: https://lore.kernel.org/r/20230303214223.49451-1-robh@kernel.org Signed-off-by: Rob Herring

dt-bindings: qspi: cdns,qspi-nor: constrain minItems/maxItems of resets

2023-03-05T23:38:57Z

The QSPI controller needs three reset items to work properly on JH7110 SoC, so there is need to change the maxItems's value to 3 and add minItems whose value is equal to 2. Other platforms do not have this constraint. Signed-off-by: William Qiu Link: https://lore.kernel.org/r/20230302105221.197421-2-william.qiu@starfivetech.com Signed-off-by: Mark Brown

Merge tag 'spi-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

2023-02-22T18:53:37Z

Pull spi updates from Mark Brown: "This has been a fairly quiet release for SPI, though it is likely that the next release will have some big changes as there's some preparatory work for multiple chip select support gone in - the rest of the code is on the list but will need to be rebased onto -rc1. Otherwise there's a couple of new tunables for chip select timings, some new devices and smaller device specific updates and fixes. - Support for configuring the hold and minimum inactive times for chip selects. - Beginnings of support for supporting devices which have multiple chip selects on a single device. - Support for newer Broadcom HSSPI and Intel controllers, Silicon Labs EM3581 and SI3210" * tag 'spi-v6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (67 commits) spi: dt-bindings: qcom,spi-qcom-qspi: document OPP and power-domains spi: spidev: drop the incorrect notice from Kconfig spi: bcm63xx-hsspi: fix error code in probe spi: bcmbca-hsspi: Fix error code in probe() function spi: synquacer: Fix timeout handling in synquacer_spi_transfer_one() spi: intel: Check number of chip selects after reading the descriptor spi: xilinx: add force_irq for QSPI mode spi: spi-st-ssc: convert to DT schema spi: Reorder fields in 'struct spi_transfer' spi: cadence-quadspi: use STIG mode for small reads spi: cadence-quadspi: setup ADDR Bits in cmd reads spi: cadence-quadspi: Add flag for direct mode writes spi: cadence-quadspi: Reset CMD_CTRL Reg on cmd r/w completion MAINTAINERS: Remove file reference for Broadcom Broadband SoC HS SPI driver entry spi: bcm63xx-hsspi: bcmbca-hsspi: fix _be16 type usage MAINTAINERS: Add entry for Broadcom Broadband SoC HS SPI drivers spi: bcmbca-hsspi: Add driver for newer HSSPI controller spi: bcm63xx-hsspi: Disable spi mem dual io read op support spi: spi-mem: Allow controller supporting mem_ops without exec_op spi: bcm63xx-hsspi: Add prepend mode support ...

spi: dt-bindings: qcom,spi-qcom-qspi: document OPP and power-domains

2023-02-17T19:18:54Z

QSPI on Qualcomm SDM845, SC7180 and SC7280 SoCs uses OPP table (both in DTS and Linux driver) and is suuplied by CX power domain. Document missing properties to fix: sc7280-idp2.dtb: spi@88dc000: Unevaluated properties are not allowed ('operating-points-v2', 'power-domains' were unexpected) Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230217155802.848178-1-krzysztof.kozlowski@linaro.org Signed-off-by: Mark Brown

spi: spi-st-ssc: convert to DT schema

2023-02-14T13:31:45Z

Convert spi-st-ssc.txt into st,ssc-spi.yaml for the ST Microelectronics SSC SPI driver. Signed-off-by: Alain Volmat Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230213192349.17101-1-avolmat@me.com Signed-off-by: Mark Brown