kernel.git/Documentation/devicetree/bindings/spi, branch linux-6.10.y

dt-bindings: spi: nxp-fspi: add imx8ulp support

2024-10-04T14:33:42Z

commit 12736adc43b7cd5cb83f274f8f37b0f89d107c97 upstream. The flexspi on imx8ulp only has 16 number of LUTs, it is different with flexspi on other imx SoC which has 32 number of LUTs. Fixes: ef89fd56bdfc ("arm64: dts: imx8ulp: add flexspi node") Cc: stable@kernel.org Acked-by: Krzysztof Kozlowski Signed-off-by: Haibo Chen Reviewed-by: Frank Li Link: https://patch.msgid.link/20240905094338.1986871-2-haibo.chen@nxp.com Signed-off-by: Mark Brown Signed-off-by: Greg Kroah-Hartman

Merge tag 'spi-v6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi

2024-05-14T21:41:01Z

Pull spi updates from Mark Brown: "The diffstat for this release is dominated by the new Airoha driver, mainly as a result of this being a generally quite quiet release. There were a couple of cleanups in the core but nothing substantial, the updates here are almost all driver specific ones. - Support for multi-word mode in the OMAP2 McSPI driver - Overhaul of the PXA2xx driver, mostly API updates - A number of DT binding conversions - Support for Airoha NAND controllers, Cirrus Logic CS35L56, Mobileye EYEQ5 and Renesas R8A779H0" * tag 'spi-v6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (87 commits) spi: dw: Bail out early on unsupported target mode spi: Remove unneded check for orig_nents MAINTAINERS: repair file entry in AIROHA SPI SNFI DRIVER spi: pxa2xx: Drop the stale entry in documentation TOC spi: pxa2xx: Don't provide struct chip_data for others spi: pxa2xx: Remove timeout field from struct chip_data spi: pxa2xx: Remove DMA parameters from struct chip_data spi: pxa2xx: Drop struct pxa2xx_spi_chip spi: pxa2xx: Don't use "proxy" headers spi: pxa2xx: Remove outdated documentation spi: pxa2xx: Move contents of linux/spi/pxa2xx_spi.h to a local one spi: pxa2xx: Provide num-cs for Sharp PDAs via device properties spi: pxa2xx: Allow number of chip select pins to be read from property spi: dt-bindings: ti,qspi: convert to dtschema spi: bitbang: Add missing MODULE_DESCRIPTION() spi: bitbang: Use NSEC_PER_*SEC rather than hard coding spi: dw: Drop default number of CS setting spi: dw: Convert dw_spi::num_cs to u32 spi: dw: Add a number of native CS auto-detection spi: dw: Convert to using BITS_TO_BYTES() macro ...

spi: dt-bindings: ti,qspi: convert to dtschema

2024-05-03T02:09:31Z

Convert txt binding of TI's qspi controller (found on their omap SoCs) to dtschema to allow for validation. The changes, w.r.t. the original txt binding, are: - Introduce "clocks" and "clock-names" which was never mentioned. - Reflect that "ti,hwmods" is deprecated and is not a "required" property anymore. - Introduce "num-cs" which allows for setting the number of chip selects. - Drop "qspi_ctrlmod". Signed-off-by: Kousik Sanagavarapu Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20240501165203.13763-1-five231003@gmail.com Signed-off-by: Mark Brown

spi: dt-bindings: airoha: Add YAML schema for SNFI controller

2024-04-30T14:40:29Z

Introduce Airoha EN7581 SPI NAND controller binding Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Conor Dooley Tested-by: Rajeev Kumar Signed-off-by: Lorenzo Bianconi Link: https://lore.kernel.org/r/f3377b323f00589e6b7ed7950c4840d18129238b.1714377864.git.lorenzo@kernel.org Signed-off-by: Mark Brown

spi: dt-bindings: armada-3700: convert to dtschema

2024-04-21T00:57:22Z

Convert txt binding of marvell armada 3700 SoC spi controller to dtschema to allow for validation. Signed-off-by: Kousik Sanagavarapu Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20240417052729.6612-1-five231003@gmail.com Signed-off-by: Mark Brown

spi: renesas,sh-msiof: Add r8a779h0 support

2024-04-17T00:52:04Z

Document support for the Clock-Synchronized Serial Interface with FIFO (MSIOF) in the Renesas R-Car V4M (R8A779H0) SoC. Signed-off-by: Geert Uytterhoeven Acked-by: Conor Dooley Link: https://lore.kernel.org/r/68a4d8ad8638c1133e21d0eef87e8982ddea3dd8.1713279687.git.geert+renesas@glider.be Signed-off-by: Mark Brown

spi: dt-bindings: cdns,qspi-nor: make cdns,fifo-depth optional

2024-04-10T17:49:16Z

Make cdns,fifo-depth devicetree property optional. Value can be detected at runtime. Upper SRAMPARTITION register bits are read-only. Procedure to find FIFO depth is therefore to write 0xFFFFFFFF and read back to get amount of writeable bits. Signed-off-by: Théo Lebrun Link: https://msgid.link/r/20240410-cdns-qspi-mbly-v3-3-7b7053449cf7@bootlin.com Signed-off-by: Mark Brown

spi: dt-bindings: cdns,qspi-nor: add mobileye,eyeq5-ospi compatible

2024-04-10T17:49:15Z

Add Mobileye EyeQ5 compatible. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Théo Lebrun Link: https://msgid.link/r/20240410-cdns-qspi-mbly-v3-2-7b7053449cf7@bootlin.com Signed-off-by: Mark Brown

spi: dt-bindings: cdns,qspi-nor: sort compatibles alphabetically

2024-04-10T17:49:14Z

Compatibles are ordered by date of addition. Switch to (deterministic) alphabetical ordering. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Théo Lebrun Link: https://msgid.link/r/20240410-cdns-qspi-mbly-v3-1-7b7053449cf7@bootlin.com Signed-off-by: Mark Brown

dt-bindings: treewide: add access-controllers description

2024-04-05T12:39:10Z

access-controllers is an optional property that allows a peripheral to refer to one or more domain access controller(s). Description of this property is added to all peripheral binding files of the peripheral under the STM32 firewall controller. It allows an accurate representation of the hardware, where various peripherals are connected to a firewall bus. The firewall can then check the peripheral accesses before allowing its device to probe. Signed-off-by: Gatien Chevallier Reviewed-by: Rob Herring Signed-off-by: Alexandre Torgue