Hosts the 0x221E linux distro kernel. https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.11.y 2013-07-04T18:40:58Z 2013-07-04T18:40:58Z Linus Torvalds 2013-07-04T18:40:58Z urn:sha1:80cc38b16389849a6e06441ace4530f6b2497c3c Pull trivial tree updates from Jiri Kosina: "The usual stuff from trivial tree" * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (34 commits) treewide: relase -> release Documentation/cgroups/memory.txt: fix stat file documentation sysctl/net.txt: delete reference to obsolete 2.4.x kernel spinlock_api_smp.h: fix preprocessor comments treewide: Fix typo in printk doc: device tree: clarify stuff in usage-model.txt. open firmware: "/aliasas" -> "/aliases" md: bcache: Fixed a typo with the word 'arithmetic' irq/generic-chip: fix a few kernel-doc entries frv: Convert use of typedef ctl_table to struct ctl_table sgi: xpc: Convert use of typedef ctl_table to struct ctl_table doc: clk: Fix incorrect wording Documentation/arm/IXP4xx fix a typo Documentation/networking/ieee802154 fix a typo Documentation/DocBook/media/v4l fix a typo Documentation/video4linux/si476x.txt fix a typo Documentation/virtual/kvm/api.txt fix a typo Documentation/early-userspace/README fix a typo Documentation/video4linux/soc-camera.txt fix a typo lguest: fix CONFIG_PAE -> CONFIG_x86_PAE in comment ... 2013-06-24T15:07:12Z Matt Porter 2013-06-24T12:01:59Z urn:sha1:0b9e49e6704b81fd991827b0b60a0a6d56d06921 The binding definition is based on the generic DMA request binding Signed-off-by: Matt Porter <mporter@ti.com> Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org> 2013-05-28T10:02:12Z Anatol Pomozov 2013-05-08T23:56:16Z urn:sha1:f884ab15afdc5514e88105c92a4e2e1e6539869a Signed-off-by: Anatol Pomozov <anatol.pomozov@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz> 2013-05-07T18:22:14Z Linus Torvalds 2013-05-07T18:22:14Z urn:sha1:1bf25e78af317e6d5d9b5594dfeb0036e0d589d6 Pull ARM SoC late cleanups from Arnd Bergmann: "These are cleanups and smaller changes that either depend on earlier feature branches or came in late during the development cycle. We normally try to get all cleanups early, so these are the exceptions: - A follow-up on the clocksource reworks, hopefully the last time we need to merge clocksource subsystem changes through arm-soc. A first set of patches was part of the original 3.10 arm-soc cleanup series because of interdependencies with timer drivers now moved out of arch/arm. - Migrating the SPEAr13xx platform away from using auxdata for DMA channel descriptions towards using information in device tree, based on the earlier SPEAr multiplatform series - A few follow-ups on the Atmel SAMA5 support and other changes for Atmel at91 based on the larger at91 reworks. - Moving the armada irqchip implementation to drivers/irqchip - Several OMAP cleanups following up on the larger series already merged in 3.10." * tag 'cleanup-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (50 commits) ARM: OMAP4: change the device names in usb_bind_phy ARM: OMAP2+: Fix mismerge for timer.c between ff931c82 and da4a686a ARM: SPEAr: conditionalize SMP code ARM: arch_timer: Silence debug preempt warnings ARM: OMAP: remove unused variable serial: amba-pl011: fix !CONFIG_DMA_ENGINE case ata: arasan: remove the need for platform_data ARM: at91/sama5d34ek.dts: remove not needed compatibility string ARM: at91: dts: add MCI DMA support ARM: at91: dts: add i2c dma support ARM: at91: dts: set #dma-cells to the correct value ARM: at91: suspend both memory controllers on at91sam9263 irqchip: armada-370-xp: slightly cleanup irq controller driver irqchip: armada-370-xp: move IRQ handler to avoid forward declaration irqchip: move IRQ driver for Armada 370/XP ARM: mvebu: move L2 cache initialization in init_early() devtree: add binding documentation for sp804 ARM: integrator-cp: convert use CLKSRC_OF for timer init ARM: versatile: use OF init for sp804 timer ARM: versatile: add versatile dtbs to dtbs target ... 2013-05-07T18:06:17Z Linus Torvalds 2013-05-07T18:06:17Z urn:sha1:38f56f33ca381751f9b8910f67e7a805ec0b68cb Pull ARM SoC device tree updates (part 2) from Arnd Bergmann: "These are mostly new device tree bindings for existing drivers, as well as changes to the device tree source files to add support for those devices, and a couple of new boards, most notably Samsung's Exynos5 based Chromebook. The changes depend on earlier platform specific updates and touch the usual platforms: omap, exynos, tegra, mxs, mvebu and davinci." * tag 'dt-for-linus-2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (169 commits) ARM: exynos: dts: cros5250: add EC device ARM: dts: Add sbs-battery for exynos5250-snow ARM: dts: Add i2c-arbitrator bus for exynos5250-snow ARM: dts: add mshc controller node for Exynos4x12 SoCs ARM: dts: Add chip-id controller node on Exynos4/5 SoC ARM: EXYNOS: Create virtual I/O mapping for Chip-ID controller using device tree ARM: davinci: da850-evm: add SPI flash support ARM: davinci: da850: override SPI DT node device name ARM: davinci: da850: add SPI1 DT node spi/davinci: add DT binding documentation spi/davinci: no wildcards in DT compatible property ARM: dts: mvebu: Convert mvebu device tree files to 64 bits ARM: dts: mvebu: introduce internal-regs node ARM: dts: mvebu: Convert all the mvebu files to use the range property ARM: dts: mvebu: move all peripherals inside soc ARM: dts: mvebu: fix cpus section indentation ARM: davinci: da850: add EHRPWM & ECAP DT node ARM/dts: OMAP3: fix pinctrl-single configuration ARM: dts: Add OMAP3430 SDP NOR flash memory binding ARM: dts: Add NOR flash bindings for OMAP2420 H4 ... 2013-04-18T06:51:31Z Olof Johansson 2013-04-18T06:50:06Z urn:sha1:c8bf98a28ff792800c9c8473382f79eb099912a5 From Sekhar Nori: v3.10 DT updates for DaVinci This set of patches adds support for PWMs and SPI controller present on DA850 and for SPI flash present on DA850 EVM. * tag 'davinci-for-v3.10/dt-2-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci: ARM: davinci: da850-evm: add SPI flash support ARM: davinci: da850: override SPI DT node device name ARM: davinci: da850: add SPI1 DT node spi/davinci: add DT binding documentation spi/davinci: no wildcards in DT compatible property ARM: davinci: da850: add EHRPWM & ECAP DT node ARM: davinci: da850: override mmc DT node device name ARM: davinci: da850: add mmc DT entries mmc: davinci_mmc: add DT support ARM: davinci: da850: add tps6507x regulator DT data ARM: regulator: add tps6507x device tree data ARM: davinci: remove test for undefined Kconfig macro ARM: davinci: mmc: derive version information from device name ARM: davinci: da850: add ECAP & EHRPWM clock nodes ARM: davinci: clk framework support for enable/disable functionality Signed-off-by: Olof Johansson <olof@lixom.net> 2013-04-17T16:49:18Z Murali Karicheri 2013-04-03T14:09:07Z urn:sha1:eed48556a789d2c7fd2dacbc0060e463ed72e449 Add binding documentation for spi-davinci module. [prakash.pm@ti.com: Follow DT naming convention for compatible property] Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Manjunathappa, Prakash <prakash.pm@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> 2013-04-16T10:52:34Z Thomas Abraham 2013-04-16T03:42:57Z urn:sha1:00ab5392cbc3f87ddfeada311e22f55dfb0bc5c6 With device core now able to setup the default pin configuration, the pin configuration code based on the deprecated Samsung specific gpio bindings is removed. Signed-off-by: Thomas Abraham <thomas.abraham@linaro.org> Signed-off-by: Doug Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Grant Likely <grant.likely@linaro.org> 2013-04-07T09:08:00Z Laxman Dewangan 2013-02-22T12:37:39Z urn:sha1:f333a331adfacf8c7a9dbf7e5f72b10a0356156b Add SPI driver for NVIDIA's Tegra114 SPI controller. This controller is different than the older SoCs SPI controller in internal design as well as register interface. This driver supports the: - non DMA based transfer for smaller transfer i.e. less than FIFO depth. - APB DMA based transfer for larger transfer i.e. more than FIFO depth. - Clock gating through runtime PM callbacks. - registration through DT only. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> 2013-04-07T09:07:56Z Andreas Larsson 2013-02-15T15:52:26Z urn:sha1:447b0c7b939f1d9e4024edf07a471ce7b1bcf002 This adds support for the mostly register-compatible SPICTRL cores from the GRLIB VHDL IP core library from Aeroflex Gaisler. They are normally running on SPARC. A different entry in of_fsl_spi_match matches this core and indicates a different hardware type that is used to set up different function pointers and special cases. The GRLIB core operates in cpu mode. The number of bits per word might be limited. There might be native chipselects selected via a slave select register. These differences to the FSL type cores, if present, are indicated by a capabilities register. Other register and function differences exists but are not relevant to the driver. Acked-by: Anton Vorontsov <anton@enomsg.org> Signed-off-by: Andreas Larsson <andreas@gaisler.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>