<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/Documentation/devicetree/bindings/riscv, branch linux-6.3.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.3.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.3.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2023-02-27T18:04:49Z</updated>
<entry>
<title>Merge tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2023-02-27T18:04:49Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2023-02-27T18:04:49Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=11c70529983e8136ea1bd5c32e4f9cd14503c644'/>
<id>urn:sha1:11c70529983e8136ea1bd5c32e4f9cd14503c644</id>
<content type='text'>
Pull ARM SoC driver updates from Arnd Bergmann:
 "As usual, there are lots of minor driver changes across SoC platforms
  from NXP, Amlogic, AMD Zynq, Mediatek, Qualcomm, Apple and Samsung.
  These usually add support for additional chip variations in existing
  drivers, but also add features or bugfixes.

  The SCMI firmware subsystem gains a unified raw userspace interface
  through debugfs, which can be used for validation purposes.

  Newly added drivers include:

   - New power management drivers for StarFive JH7110, Allwinner D1 and
     Renesas RZ/V2M

   - A driver for Qualcomm battery and power supply status

   - A SoC device driver for identifying Nuvoton WPCM450 chips

   - A regulator coupler driver for Mediatek MT81xxv"

* tag 'soc-drivers-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (165 commits)
  power: supply: Introduce Qualcomm PMIC GLINK power supply
  soc: apple: rtkit: Do not copy the reg state structure to the stack
  soc: sunxi: SUN20I_PPU should depend on PM
  memory: renesas-rpc-if: Remove redundant division of dummy
  soc: qcom: socinfo: Add IDs for IPQ5332 and its variant
  dt-bindings: arm: qcom,ids: Add IDs for IPQ5332 and its variant
  dt-bindings: power: qcom,rpmpd: add RPMH_REGULATOR_LEVEL_LOW_SVS_L1
  firmware: qcom_scm: Move qcom_scm.h to include/linux/firmware/qcom/
  MAINTAINERS: Update qcom CPR maintainer entry
  dt-bindings: firmware: document Qualcomm SM8550 SCM
  dt-bindings: firmware: qcom,scm: add qcom,scm-sa8775p compatible
  soc: qcom: socinfo: Add Soc IDs for IPQ8064 and variants
  dt-bindings: arm: qcom,ids: Add Soc IDs for IPQ8064 and variants
  soc: qcom: socinfo: Add support for new field in revision 17
  soc: qcom: smd-rpm: Add IPQ9574 compatible
  soc: qcom: pmic_glink: remove redundant calculation of svid
  soc: qcom: stats: Populate all subsystem debugfs files
  dt-bindings: soc: qcom,rpmh-rsc: Update to allow for generic nodes
  soc: qcom: pmic_glink: add CONFIG_NET/CONFIG_OF dependencies
  soc: qcom: pmic_glink: Introduce altmode support
  ...
</content>
</entry>
<entry>
<title>Merge tag 'riscv-for-linus-6.3-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux</title>
<updated>2023-02-25T19:14:08Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2023-02-25T19:14:08Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=01687e7c935ef70eca69ea2d468020bc93e898dc'/>
<id>urn:sha1:01687e7c935ef70eca69ea2d468020bc93e898dc</id>
<content type='text'>
Pull RISC-V updates from Palmer Dabbelt:
 "There's a bunch of fixes/cleanups throughout the tree as usual, but we
  also have a handful of new features:

   - Various improvements to the extension detection and alternative
     patching infrastructure

   - Zbb-optimized string routines

   - Support for cpu-capacity in the RISC-V DT bindings

   - Zicbom no longer depends on toolchain support

   - Some performance and code size improvements to ftrace

   - Support for ARCH_WANT_LD_ORPHAN_WARN

   - Oops now contain the faulting instruction"

* tag 'riscv-for-linus-6.3-mw1' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: (67 commits)
  RISC-V: add a spin_shadow_stack declaration
  riscv: mm: hugetlb: Enable ARCH_WANT_HUGETLB_PAGE_OPTIMIZE_VMEMMAP
  riscv: Add header include guards to insn.h
  riscv: alternative: proceed one more instruction for auipc/jalr pair
  riscv: Avoid enabling interrupts in die()
  riscv, mm: Perform BPF exhandler fixup on page fault
  RISC-V: take text_mutex during alternative patching
  riscv: hwcap: Don't alphabetize ISA extension IDs
  RISC-V: fix ordering of Zbb extension
  riscv: jump_label: Fixup unaligned arch_static_branch function
  RISC-V: Only provide the single-letter extensions in HWCAP
  riscv: mm: fix regression due to update_mmu_cache change
  scripts/decodecode: Add support for RISC-V
  riscv: Add instruction dump to RISC-V splats
  riscv: select ARCH_WANT_LD_ORPHAN_WARN for !XIP_KERNEL
  riscv: vmlinux.lds.S: explicitly catch .init.bss sections from EFI stub
  riscv: vmlinux.lds.S: explicitly catch .riscv.attributes sections
  riscv: vmlinux.lds.S: explicitly catch .rela.dyn symbols
  riscv: lds: define RUNTIME_DISCARD_EXIT
  RISC-V: move some stray __RISCV_INSN_FUNCS definitions from kprobes
  ...
</content>
</entry>
<entry>
<title>Merge tag 'devicetree-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux</title>
<updated>2023-02-24T21:31:53Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2023-02-24T21:31:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=8395d932d24a9b4c01ab33ed0b4b2de06328afc2'/>
<id>urn:sha1:8395d932d24a9b4c01ab33ed0b4b2de06328afc2</id>
<content type='text'>
Pull devicetree updates from Rob Herring:
 "DT core:

   - Add node lifecycle unit tests

   - Add of_property_present() helper aligned with fwnode API

   - Print more information on reserved regions on boot

   - Update dtc to upstream v1.6.1-66-gabbd523bae6e

   - Use strscpy() to instead of strncpy() in DT core

   - Add option for schema validation on %.dtb targets

  Bindings:

   - Add/fix support for listing multiple patterns in DT_SCHEMA_FILES

   - Rework external memory controller/bus bindings to properly support
     controller specific child node properties

   - Convert loongson,ls1x-intc, fcs,fusb302, sil,sii8620, Rockchip
     RK3399 PCIe, Synquacer I2C, and Synquacer EXIU bindings to DT
     schema format

   - Add RiscV SBI PMU event mapping binding

   - Add missing contraints on Arm SCMI child node allowed properties

   - Add a bunch of missing Socionext UniPhier glue block bindings and
     example fixes

   - Various fixes for duplicate or conflicting type definitions on DT
     properties"

* tag 'devicetree-for-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (66 commits)
  dt-bindings: regulator: Add mps,mpq7932 power-management IC
  of: dynamic: Fix spelling mistake "kojbect" -&gt; "kobject"
  dt-bindings: drop Sagar Kadam from SiFive binding maintainership
  dt-bindings: sram: qcom,imem: document sm8450
  dt-bindings: interrupt-controller: convert loongson,ls1x-intc.txt to json-schema
  dt-bindings: arm: Add Cortex-A715 and X3
  of: dynamic: add lifecycle docbook info to node creation functions
  of: add consistency check to of_node_release()
  of: do not use "%pOF" printk format on node with refcount of zero
  of: unittest: add node lifecycle tests
  of: update kconfig unittest help
  of: add processing of EXPECT_NOT to of_unittest_expect
  of: prepare to add processing of EXPECT_NOT to of_unittest_expect
  of: Use preferred of_property_read_* functions
  of: Use of_property_present() helper
  of: Add of_property_present() helper
  of: reserved_mem: Use proper binary prefix
  dt-bindings: Fix multi pattern support in DT_SCHEMA_FILES
  of: reserved-mem: print out reserved-mem details during boot
  dt-bindings: serial: restrict possible child node names
  ...
</content>
</entry>
<entry>
<title>dt-bindings: drop Sagar Kadam from SiFive binding maintainership</title>
<updated>2023-02-21T16:22:04Z</updated>
<author>
<name>Conor Dooley</name>
</author>
<published>2023-02-17T18:00:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=fb4b06f521c1cdf04088151ed587c188862e3111'/>
<id>urn:sha1:fb4b06f521c1cdf04088151ed587c188862e3111</id>
<content type='text'>
Sagar's email listed in maintainers is bouncing as his division was sold
off by the company. I attempted to contact him some days ago on what the
bounce email told me was his new contact information, but am yet to
receive a response.

Paul and Palmer are listed on each of the bindings, both of whom were
alive &amp; well as of Wednesday so the bindings remain maintained.

CC: Sagar Kadam &lt;sagar.kadam@openfive.com&gt;
CC: Sagar Kadam &lt;sagar.kadam@sifive.com&gt;
Link: https://lore.kernel.org/all/785425ca-4000-a7e4-16d6-4d68c91b158d@kernel.org/
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20230217180035.39658-1-conor@kernel.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'soc-dt-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2023-02-20T23:49:56Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2023-02-20T23:49:56Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=950b6662e26e381cf8834b9b78b08261890ee697'/>
<id>urn:sha1:950b6662e26e381cf8834b9b78b08261890ee697</id>
<content type='text'>
Pull SoC DT updates from Arnd Bergmann:
 "About a quarter of the changes are for 32-bit arm, mostly filling in
  device support for existing machines and adding minor cleanups, mostly
  for Qualcomm and Samsung based machines.

  Two new 32-bit SoCs are added, both are quad-core Cortex-A7 chips from
  Rockchips that have been around for a while but were lacking kernel
  support so far: RV1126 is a Vision SoC with an NPU and is used in the
  Edgeble Neural Compute Module 2(Neu2) board, while RK3128 is design
  for TV boxes and so far only comes with a dts for its refernece
  design.

  The other 32-bit boards that were added are two ASpeed AST2600 based
  BMC boards, the Microchip sam9x60_curiosity development board (Armv5
  based!), the Enclustra PE1 FPGA-SoM baseboard, and a few more boards
  for i.MX53 and i.MX6ULL.

  On the RISC-V side, there are fewer patches, but a total of ten new
  single-board computers based on variations of the Allwinner D1/T113
  chip, plus one more board based on Microchip Polarfire.

  As usual, arm64 has by far the most changes here, with over 700
  non-merge changesets, among them over 400 alone for Qualcomm. The
  newly added SoCs this time are all recent high-end embedded SoCs for
  various markets, each on comes with support for its reference board:

   - Qualcomm SM8550 (Snapdragon 8 Gen 2) for mobile phones
   - Qualcomm QDU1000/QRU1000 5G RAN platform
   - Rockchips RK3588/RK3588s for tablets, chromebooks and SBCs
   - TI J784S4 for industrial and automotive applications

  In total, there are 46 new arm64 machines:
   - Reference platforms for each of the five new SoCs
   - Three Amlogic based development boards
   - Six embedded machines based on NXP i.MX8MM and i.MX8MP
   - The Mediatek mt7986a based Banana Pi R3 router
   - Six tablets based on Qualcomm MSM8916 (Snapdragon 410), SM6115
     (Snapdragon 662) and SM8250 (Snapdragon 865)
   - Two LTE dongles, also based on MSM8916
   - Seven mobile phones, based on Qualcomm MSM8953 (Snapdragon 610),
     SDM450 and SDM632
   - Three chromebooks based on Qualcomm SC7280 (Snapdragon 7c)
   - Nine development boards based on Rockchips RK3588, RK3568, RK3566
     and RK3328.
   - Five development machines based on TI K3 (AM642/AM654/AM68/AM69)

  The cleanup of dtc warnings continues across all platforms, adding to
  the total number of changes"

* tag 'soc-dt-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (1035 commits)
  dt-bindings: riscv: correct starfive visionfive 2 compatibles
  ARM: dts: socfpga: Add enclustra PE1 devicetree
  dt-bindings: altera: Add enclustra mercury PE1
  arm64: dts: qcom: msm8996: align RPM G-Link clock-controller node with bindings
  arm64: dts: qcom: qcs404: align RPM G-Link node with bindings
  arm64: dts: qcom: ipq6018: align RPM G-Link node with bindings
  arm64: dts: qcom: sm8550: remove invalid interconnect property from cryptobam
  arm64: dts: qcom: sc7280: Adjust zombie PWM frequency
  arm64: dts: qcom: sc8280xp-pmics: Specify interrupt parent explicitly
  arm64: dts: qcom: sm7225-fairphone-fp4: enable remaining i2c busses
  arm64: dts: qcom: sm7225-fairphone-fp4: move status property down
  arm64: dts: qcom: pmk8350: Use the correct PON compatible
  arm64: dts: qcom: sc8280xp-x13s: Enable external display
  arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink
  arm64: dts: qcom: sc8280xp: Add USB-C-related DP blocks
  arm64: dts: qcom: sm8350-hdk: enable GPU
  arm64: dts: qcom: sm8350: add GPU, GMU, GPU CC and SMMU nodes
  arm64: dts: qcom: sm8350: finish reordering nodes
  arm64: dts: qcom: sm8350: move more nodes to correct place
  arm64: dts: qcom: sm8350: reorder device nodes
  ...
</content>
</entry>
<entry>
<title>dt-bindings: riscv: correct starfive visionfive 2 compatibles</title>
<updated>2023-02-16T21:08:25Z</updated>
<author>
<name>Conor Dooley</name>
</author>
<published>2023-02-16T13:15:12Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e43efb6d713bca3855909a2f9caec280a2b0a503'/>
<id>urn:sha1:e43efb6d713bca3855909a2f9caec280a2b0a503</id>
<content type='text'>
Using "va" and "vb" doesn't match what's written on the board, or the
communications from StarFive.
Switching to using the silkscreened version number will ease confusion &amp;
the risk of another spin of the board containing a "conflicting" version
identifier.
As the binding has not made it into mainline yet, take the opportunity
to "correct" things.

Suggested-by: Emil Renner Berthing &lt;emil.renner.berthing@canonical.com&gt;
Link: https://lore.kernel.org/linux-riscv/Y+4AxDSDLyL1WAqh@wendy/
Fixes: 97b7ed072784 ("dt-bindings: riscv: Add StarFive JH7110 SoC and VisionFive 2 board")
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20230216131511.3327943-1-conor.dooley@microchip.com
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: riscv: add a capacity-dmips-mhz cpu property</title>
<updated>2023-02-15T03:24:06Z</updated>
<author>
<name>Conor Dooley</name>
</author>
<published>2023-01-04T18:05:14Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=991994509ee93f7698251e696b8e5591e01b7f68'/>
<id>urn:sha1:991994509ee93f7698251e696b8e5591e01b7f68</id>
<content type='text'>
Since commit 03f11f03dbfe ("RISC-V: Parse cpu topology during boot.")
RISC-V has used the generic arch topology code, which provides for
disparate CPU capacities. We never defined a binding to acquire this
information from the DT though, so document the one already used by the
generic arch topology code: "capacity-dmips-mhz".

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Ley Foon Tan &lt;leyfoon.tan@starfivetech.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20230104180513.1379453-3-conor@kernel.org
Signed-off-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'sunxi-dt-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into arm/dt</title>
<updated>2023-01-30T21:42:51Z</updated>
<author>
<name>Arnd Bergmann</name>
</author>
<published>2023-01-30T21:42:37Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ffe4bd3db832a36b69a764d3895e34c726f4f3cf'/>
<id>urn:sha1:ffe4bd3db832a36b69a764d3895e34c726f4f3cf</id>
<content type='text'>
- introduce Allwinner D1 DTSI
- add boards: Dongshan Nezha STU, MangoPi MQ (Pro), Sipeed Lichee RV,
  Nezha
- add D1 power controller node
- Add SATA regulator to Bananapi M3
- fix regulator reference for nanopi-duo2
- fix GPIO node names
- align HDMI CEC node name for h3-beelink-x2
- add DPHY interrupt to A64 and A33

* tag 'sunxi-dt-for-6.3-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  riscv: dts: allwinner: d1: Add power controller node
  riscv: Add the Allwinner SoC family Kconfig option
  riscv: dts: allwinner: Add Dongshan Nezha STU devicetree
  riscv: dts: allwinner: Add MangoPi MQ Pro devicetree
  riscv: dts: allwinner: Add Sipeed Lichee RV devicetrees
  riscv: dts: allwinner: Add Allwinner D1 Nezha devicetree
  riscv: dts: allwinner: Add MangoPi MQ devicetree
  riscv: dts: allwinner: Add the D1/D1s SoC devicetree
  dt-bindings: riscv: Add Allwinner D1/D1s board compatibles
  dt-bindings: vendor-prefixes: Add Allwinner D1/D1s board vendors
  MAINTAINERS: Match the sun20i family of Allwinner SoCs
  ARM: dts: sun8i: a83t: bananapi-m3: describe SATA disk regulator
  ARM: dts: sun8i: nanopi-duo2: Fix regulator GPIO reference
  ARM: dts: sunxi: Fix GPIO LED node names
  ARM: dts: sun8i: h3-beelink-x2: align HDMI CEC node names with dtschema
  arm64: dts: allwinner: a64: Add DPHY interrupt
  ARM: dts: sun8i: a33: Add DPHY interrupt

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: riscv: Add Allwinner D1/D1s board compatibles</title>
<updated>2023-01-27T22:01:31Z</updated>
<author>
<name>Samuel Holland</name>
</author>
<published>2023-01-26T04:57:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a0097fec3be61a816325173b425bba64d302bb39'/>
<id>urn:sha1:a0097fec3be61a816325173b425bba64d302bb39</id>
<content type='text'>
Several SoMs and boards are available that feature the Allwinner D1 or
D1s SoC. Document their compatible strings.

Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Reviewed-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Guo Ren &lt;guoren@kernel.org&gt;
Reviewed-by: Heiko Stuebner &lt;heiko.stuebner@vrull.eu&gt;
Signed-off-by: Samuel Holland &lt;samuel@sholland.org&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Link: https://lore.kernel.org/r/20230126045738.47903-4-samuel@sholland.org
Signed-off-by: Jernej Skrabec &lt;jernej.skrabec@gmail.com&gt;
</content>
</entry>
<entry>
<title>Merge patch series "Add a devicetree for the Aldec PolarFire SoC TySoM"</title>
<updated>2023-01-25T11:09:32Z</updated>
<author>
<name>Conor Dooley</name>
</author>
<published>2023-01-25T11:09:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d9c36d016f6112e636f18a49a5f779c7f8667deb'/>
<id>urn:sha1:d9c36d016f6112e636f18a49a5f779c7f8667deb</id>
<content type='text'>
As it says on the tin, add a DT for this board. It's been sitting on my
desk for a while, so may as well have it upstream...

The DT is only partially complete, as it needs the fabric content added.
Unfortunately, I don't have a reference design in RTL or SmartDesign
for it and therefore don't know what that fabric content is.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
</feed>
