kernel.git/Documentation/devicetree/bindings/pinctrl, branch linux-6.15.yHosts the 0x221E linux distro kernel.
https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.15.y2025-03-18T10:09:15ZMerge tag 'samsung-pinctrl-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel2025-03-18T10:09:15ZLinus Walleij2025-03-18T10:09:15Zurn:sha1:eb8578843f693040b15e7aad6b901588a511a6ac
Samsung pinctrl drivers changes for v6.15
1. Add pin controller drivers for newly usptreamed Samsung Exynos2200
and Exynos7870.
2. Correct filter configuration offset of some of Google GS101 SoC pin
banks, which later is supposed to be used during system
suspend/resume.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
dt-bindings: pinctrl: qcom: Add egpio function for sa8775p2025-03-17T13:24:45ZWasim Nazir2025-03-12T07:25:08Zurn:sha1:dc4a70298ecd017743c9a35f426ec69dabef21aa
Add egpio function for TLMM pinctrl on sa8775p platform.
Signed-off-by: Wasim Nazir <quic_wasimn@quicinc.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/20250312072509.3247885-2-quic_wasimn@quicinc.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
dt-bindings: pinctrl: airoha: Add missing gpio-ranges property2025-03-17T13:24:45ZLorenzo Bianconi2025-03-07T17:08:19Zurn:sha1:2ef854728f8534d418e9964320cb39d2a6beafdc
Introduce leftover gpio-ranges property for Airoha EN7581 pinctrl binding
Fixes: d0c15cb96b74 ("dt-bindings: pinctrl: airoha: Add EN7581 pinctrl")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20250307-en7581-gpio-range-v1-1-de1262105428@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
dt-bindings: pinctrl: at91-pio4: add microchip,sama7d65-pinctrl2025-03-17T13:24:45ZDharma Balasubiramani2025-03-06T16:03:19Zurn:sha1:4cc1b5ce232e65eb4bc8435949d2ce4ab23764b4
Add pinctrl bindings for microchip sama7d65 SoC.
Signed-off-by: Dharma Balasubiramani <dharma.b@microchip.com>
Signed-off-by: Ryan Wanner <Ryan.Wanner@microchip.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/821255840c09d8d9cebbb1f2daaedd8a7c138875.1736522006.git.Ryan.Wanner@microchip.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
bindings: pinctrl: ingenic: add x16002025-03-14T09:51:22ZH. Nikolaus Schaller2025-03-01T10:00:38Zurn:sha1:33d6b8ca051ac33c67c464c57f431af916f015dd
Add bindings for the Lumissil/Ingenic X1600 SoC.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: H. Nikolaus Schaller <hns@goldelico.com>
Link: https://lore.kernel.org/a9865c817d5aa9046dcbb251d834c1dbcc4e9219.1740823241.git.hns@goldelico.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
dt-bindings: pinctrl: add compatible for Allwinner A523/T5272025-03-13T13:48:57ZAndre Przywara2025-03-06T23:58:25Zurn:sha1:d626d248caaea408a7fe355ddf59e871aa58b0e1
The A523 contains a pin controller similar to previous SoCs, although
using 10 GPIO banks (PortB-PortK), all of them being IRQ capable.
With this SoC we introduce a new style of binding, where the pinmux values
for each pin group are stored in the new "allwinner,pinmux" property in
the DT node, instead of requiring every driver to store a mapping between
the function names and the required pinmux.
Add a new binding file, since all the different variants of the old
binding are making the file a bit unwieldy to handle already, and the new
property would make the situation worse.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20250306235827.4895-7-andre.przywara@arm.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
dt-bindings: pinctrl: Add bindings for BCM21664 pin controller2025-03-05T07:53:21ZArtur Weber2025-03-03T20:54:46Zurn:sha1:df3a388eee6169adc1018aa2bacf2f9edd47bebd
Add device tree bindings for the pin controller included in the
BCM21664 chip. The bindings are based off brcm,bcm11351-pinctrl.yaml;
both chips use the same driver, but have different pins, and the
BCM21664 has 6 alt modes instead of 4.
Signed-off-by: Artur Weber <aweber.kernel@gmail.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/20250303-bcm21664-pinctrl-v3-1-5f8b80e4ab51@gmail.com
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
dt-bindings: pinctrl: Add pinctrl support for RK35282025-03-04T07:49:59ZJonas Karlman2025-02-28T06:40:08Zurn:sha1:6556eacb4fd6bae090c1bdc8fa8e2d9eedade700
Add compatible string for RK3528 pin controller.
Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/20250228064024.3200000-3-jonas@kwiboo.se
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
dt-bindings: pinctrl: samsung: add exynos7870-wakeup-eint compatible2025-03-03T09:06:00ZKaustabh Chakraborty2025-02-28T19:35:18Zurn:sha1:c1ab2297bc746b07b96205dddc45979feac22f4d
Exynos7870's wakeup pin controller is entirely register-compatible with
Exynos7, thus document the node for Exynos7870 appropriately.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Link: https://lore.kernel.org/r/20250301-exynos7870-pinctrl-v3-2-ba1da9d3cd2f@disroot.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
dt-bindings: pinctrl: samsung: add exynos7870-pinctrl compatible2025-03-03T09:06:00ZKaustabh Chakraborty2025-02-28T19:35:17Zurn:sha1:129bdbd05650f4c11fb8995f8b6e63589ce4cb33
Document a dedicated compatible string for Exynos7870's pin controllers,
having 8 GPIO pin banks.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org>
Link: https://lore.kernel.org/r/20250301-exynos7870-pinctrl-v3-1-ba1da9d3cd2f@disroot.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>