<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/Documentation/devicetree/bindings/pinctrl, branch linux-3.18.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.18.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-3.18.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2018-04-08T09:49:48Z</updated>
<entry>
<title>Documentation: pinctrl: palmas: Add ti,palmas-powerhold-override property definition</title>
<updated>2018-04-08T09:49:48Z</updated>
<author>
<name>Keerthy</name>
</author>
<published>2016-11-28T04:01:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=047ade50b913d7b29f9980634ed9666829e8039b'/>
<id>urn:sha1:047ade50b913d7b29f9980634ed9666829e8039b</id>
<content type='text'>
commit 0ea66f76ba17a4b229caaadd77de694111b21769 upstream.

GPIO7 is configured in POWERHOLD mode which has higher priority
over DEV_ON bit and keeps the PMIC supplies on even after the DEV_ON
bit is turned off. This property enables driver to over ride the
POWERHOLD value to GPIO7 so as to turn off the PMIC in power off
scenarios.

Signed-off-by: Keerthy &lt;j-keerthy@ti.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Ben Hutchings &lt;ben.hutchings@codethink.co.uk&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>pinctrl: mvebu: armada-xp: fix functions of MPP48</title>
<updated>2015-07-04T03:02:27Z</updated>
<author>
<name>Thomas Petazzoni</name>
</author>
<published>2015-06-09T16:46:58Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3f8f2813f0e8dc6cb88c908b301b6f3baf13efb6'/>
<id>urn:sha1:3f8f2813f0e8dc6cb88c908b301b6f3baf13efb6</id>
<content type='text'>
[ Upstream commit ea78b9511a54d0de026e04b5da86b30515072f31 ]

There was a mistake in the definition of the functions for MPP48 on
Marvell Armada XP. The second function is dev(clkout), and not tclk.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Cc: &lt;stable@vger.kernel.org&gt; # v3.7+
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mvebu: armada-xp: remove non-existing VDD cpu_pd functions</title>
<updated>2015-07-04T03:02:27Z</updated>
<author>
<name>Thomas Petazzoni</name>
</author>
<published>2015-06-09T16:46:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e6b7cff45654a2858ec93ed42a7351c395752850'/>
<id>urn:sha1:e6b7cff45654a2858ec93ed42a7351c395752850</id>
<content type='text'>
[ Upstream commit 80b3d04feab5e69d51cb2375eb989a7165e43e3b ]

The latest version of the Armada XP datasheet no longer documents the
VDD cpu_pd functions, which might indicate they are not working and/or
not supported. This commit ensures the pinctrl driver matches the
datasheet.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Cc: &lt;stable@vger.kernel.org&gt; # v3.7+
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mvebu: armada-xp: remove non-existing NAND pins</title>
<updated>2015-07-04T03:02:26Z</updated>
<author>
<name>Thomas Petazzoni</name>
</author>
<published>2015-06-09T16:46:56Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f7cff363596d59b5b3a298a7b4bc7429cf598535'/>
<id>urn:sha1:f7cff363596d59b5b3a298a7b4bc7429cf598535</id>
<content type='text'>
[ Upstream commit bc99357f3690c11817756adfee0ece811a3db2e7 ]

After updating to a more recent version of the Armada XP datasheet, we
realized that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Cc: &lt;stable@vger.kernel.org&gt; # v3.7+
Fixes: 463e270f766a ("pinctrl: mvebu: add pinctrl driver for Armada XP")
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mvebu: armada-375: remove non-existing NAND re/we pins</title>
<updated>2015-07-04T03:02:26Z</updated>
<author>
<name>Thomas Petazzoni</name>
</author>
<published>2015-06-09T16:46:55Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ac0c311b22070e22dd421abdbbec7d993b82f5b5'/>
<id>urn:sha1:ac0c311b22070e22dd421abdbbec7d993b82f5b5</id>
<content type='text'>
[ Upstream commit e5447d26092c72ef3346615ee558c9112ef8063f ]

After updating to a more recent version of the Armada 375, we realized
that some of the pins documented as having a NAND-related
functionality in fact did not have such functionality. This commit
updates the pinctrl driver accordingly.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Cc: &lt;stable@vger.kernel.org&gt; # v3.15+
Fixes: ce3ed59dcddd ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 375")
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mvebu: armada-370: fix spi0 pin description</title>
<updated>2015-07-04T03:02:26Z</updated>
<author>
<name>Thomas Petazzoni</name>
</author>
<published>2015-06-09T16:46:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e0855c589bf05249c4d5493ceb8a34c4e2463932'/>
<id>urn:sha1:e0855c589bf05249c4d5493ceb8a34c4e2463932</id>
<content type='text'>
[ Upstream commit 438881dfddb9107ef0eb30b49368e91e092f0b3e ]

Due to a mistake, the CS0 and CS1 SPI0 functions were incorrectly
named "spi0-1" instead of just "spi0". This commit fixes that.

This DT binding change does not affect any of the in-tree users.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Cc: &lt;stable@vger.kernel.org&gt; # v3.7+
Fixes: 5f597bb2be57 ("pinctrl: mvebu: add pinctrl driver for Armada 370")
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</content>
</entry>
<entry>
<title>pinctrl: mvebu: armada-38x: fix PCIe functions</title>
<updated>2015-07-04T03:02:26Z</updated>
<author>
<name>Thomas Petazzoni</name>
</author>
<published>2015-06-09T16:46:53Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d9c5ec5e9ad005262aa73f352d7624fdb9c4a84d'/>
<id>urn:sha1:d9c5ec5e9ad005262aa73f352d7624fdb9c4a84d</id>
<content type='text'>
[ Upstream commit 331642fbf24a1c16b2669ca0a6479b5fcd6dd5b2 ]

A new revision of the Marvell Armada 38x hardware datasheet unveiled
that the definition of some of the PCIe functions were not
correct. This commit fixes the pinctrl driver accordingly.

Some PCIe functions simply do not exist, some of the PCIe functions in
fact were corresponding to other functions, and some PCIe functions
have been added.

Note: the seemingly unrelated removal of spi(cs2) on MPP47 is related:
this function is in fact implemented on MPP43, instead of a PCIe
function.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Cc: &lt;stable@vger.kernel.org&gt; # v3.15+
Fixes: ca6d9a084b56f ("pinctrl: mvebu: add pin-muxing driver for the Marvell Armada 380/385")
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Sasha Levin &lt;sasha.levin@oracle.com&gt;
</content>
</entry>
<entry>
<title>documentation: pinctrl bindings: Fix trivial typo 'abitrary'</title>
<updated>2014-11-18T18:01:52Z</updated>
<author>
<name>Soren Brinkmann</name>
</author>
<published>2014-11-06T15:38:51Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=a0e27f51ba8a04125c22a95c4d3e98297a7191de'/>
<id>urn:sha1:a0e27f51ba8a04125c22a95c4d3e98297a7191de</id>
<content type='text'>
A misspelled 'arbitrary' propagated to quite a few locations in the DT
binding documentation for pin-controllers. Fixing by:
  git grep abitrary | cut -f1 -d: | xargs sed -i 's/abitrary/arbitrary/'

Reported-by: Andreas Färber &lt;afaerber@suse.de&gt;
Signed-off-by: Soren Brinkmann &lt;soren.brinkmann@xilinx.com&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'pinctrl-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl</title>
<updated>2014-10-08T00:56:28Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2014-10-08T00:56:28Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2b425a3f112aa24666fc5f415c8bf0e9132bb6c0'/>
<id>urn:sha1:2b425a3f112aa24666fc5f415c8bf0e9132bb6c0</id>
<content type='text'>
Pull pin control changes from Linus Walleij:
 "This is the bulk of pin control changes for the v3.18 development
  series:

   - New drivers for the Freescale i.MX21, Qualcomm APQ8084 pin
     controllers.

   - Incremental new features on the Rockchip, atlas 6, OMAP, AM437x,
     APQ8064, prima2, AT91, Tegra, i.MX, Berlin and Nomadik.

   - Push Freescale drivers down into their own subdirectory.

   - Assorted sprays of syntax and semantic fixes"

* tag 'pinctrl-v3.18-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (48 commits)
  pinctrl: specify bindings for pins and groups
  pinctrl: nomadik: improve GPIO debug prints
  pinctrl: abx500: refactor DT parser to take two paths
  pinctrl: abx500: use helpers for map allocation/free
  pinctrl: alter device tree bindings for functions
  pinctrl: nomadik: refactor DT parser to take two paths
  pinctrl: nomadik: use utils map free function
  pinctrl: nomadik: use util function to reserve maps
  pinctrl: qcom: use restart_notifier mechanism for ps_hold
  pinctrl: sh-pfc: sh73a0: Remove unnecessary SoC data allocation
  pinctrl: berlin: fix the dt_free_map function
  pinctrl: at91: disable PD or PU before enabling PU or PD
  pinctrl: st: remove gpiochip in failure cases
  pinctrl: at91: Fix error handling while doing gpiochio_irqchip_add
  pinctrl: at91: Fix failure path in at91_gpio_probe path
  pinctrl: lantiq: Release gpiochip resources in fail case
  pinctrl: imx: detect uninitialized pins
  pinctrl: tegra: Add MIPI pad control
  pinctrl: at91: Switch to using managed clk_get
  pinctrl: adi2: Remove duplicate gpiochip_remove_pin_ranges
  ...
</content>
</entry>
<entry>
<title>pinctrl: specify bindings for pins and groups</title>
<updated>2014-10-02T07:41:46Z</updated>
<author>
<name>Linus Walleij</name>
</author>
<published>2014-10-02T07:41:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2cdef8f4e1ac28adc81326758a7767c18479a95d'/>
<id>urn:sha1:2cdef8f4e1ac28adc81326758a7767c18479a95d</id>
<content type='text'>
Pin configurations can be per-pin or per-group. Make sure that the
per-group case is covered by the bindings.

Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
