<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/Documentation/devicetree/bindings/mailbox, branch linux-5.12.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.12.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-5.12.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2021-02-15T05:25:06Z</updated>
<entry>
<title>dt-bindings: mailbox: Add binding for SDX55 APCS</title>
<updated>2021-02-15T05:25:06Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
</author>
<published>2021-01-18T04:11:52Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0d17014e91898b20fb5010a03470f11fee3c6391'/>
<id>urn:sha1:0d17014e91898b20fb5010a03470f11fee3c6391</id>
<content type='text'>
Add devicetree YAML binding for SDX55 APCS GCC block. The APCS block
acts as the mailbox controller and also provides a clock output and
takes 3 clock sources (pll, aux, ref) as input.

Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@linaro.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: omap: Update binding for AM64x SoCs</title>
<updated>2021-02-15T05:23:14Z</updated>
<author>
<name>Suman Anna</name>
</author>
<published>2021-02-09T19:36:42Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7a4647bdc242256d7f70ba562d19055bf11e54a6'/>
<id>urn:sha1:7a4647bdc242256d7f70ba562d19055bf11e54a6</id>
<content type='text'>
Update the existing OMAP Mailbox binding to include the info for
AM64x SoCs. There are some minor IP integration differences between
the AM64x SoCs and the previous AM65x and J721E SoC families.

Signed-off-by: Suman Anna &lt;s-anna@ti.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: qcom: Add SC8180X APCS compatible</title>
<updated>2021-02-15T05:21:39Z</updated>
<author>
<name>Bjorn Andersson</name>
</author>
<published>2021-01-21T01:41:29Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=114c93bf2859550f1b63ddab14eb0601be57ceea'/>
<id>urn:sha1:114c93bf2859550f1b63ddab14eb0601be57ceea</id>
<content type='text'>
Add compatible for the Qualcomm SC8180x APCS block to the Qualcomm APCS
binding.

Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Drop redundant maxItems/items</title>
<updated>2020-12-23T01:58:24Z</updated>
<author>
<name>Rob Herring</name>
</author>
<published>2020-12-22T04:06:45Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=2b8f061a4f505aad11fd36adb24c3138ad09b96b'/>
<id>urn:sha1:2b8f061a4f505aad11fd36adb24c3138ad09b96b</id>
<content type='text'>
'maxItems' equal to the 'items' list length is redundant. 'maxItems' is
preferred for a single entry while greater than 1 should have an 'items'
list.

A meta-schema check for this is pending once these existing cases are
fixed.

Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: dri-devel@lists.freedesktop.org
Cc: dmaengine@vger.kernel.org
Cc: alsa-devel@alsa-project.org
Cc: linux-usb@vger.kernel.org
Acked-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Reviewed-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Acked-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Acked-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
Acked-by: Mark Brown &lt;broonie@kernel.org&gt;
Link: https://lore.kernel.org/r/20201222040645.1323611-1-robh@kernel.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox : arm,mhuv2: Add bindings</title>
<updated>2020-12-10T01:25:55Z</updated>
<author>
<name>Viresh Kumar</name>
</author>
<published>2020-11-17T10:02:05Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=aa80be5043a6d87c84112c37afe5cf4aa5cb9e11'/>
<id>urn:sha1:aa80be5043a6d87c84112c37afe5cf4aa5cb9e11</id>
<content type='text'>
This patch adds device tree binding for ARM Message Handling Unit (MHU)
controller version 2.

Based on earlier work by Morten Borup Petersen.

Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Co-developed-by: Tushar Khandelwal &lt;tushar.khandelwal@arm.com&gt;
Signed-off-by: Tushar Khandelwal &lt;tushar.khandelwal@arm.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: mtk-gce: fix incorrect mbox-cells value</title>
<updated>2020-10-26T01:37:55Z</updated>
<author>
<name>Fabien Parent</name>
</author>
<published>2020-10-18T19:30:16Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f83b03fc727ab56a77e68713d6e40299698f3c9f'/>
<id>urn:sha1:f83b03fc727ab56a77e68713d6e40299698f3c9f</id>
<content type='text'>
As the binding documentation says, #mbox-cells must have a value of 2,
but the example use a value 3. The MT8173 device tree correctly use
mbox-cells = &lt;2&gt;. This commit fixes the example.

Fixes: 19d8e335d58a ("dt-binding: gce: remove atomic_exec in mboxes property")
Reviewed-by: Matthias Brugger &lt;matthias.bgg@gmail.com&gt;
Signed-off-by: Fabien Parent &lt;fparent@baylibre.com&gt;
Link: https://lore.kernel.org/r/20201018193016.3339045-1-fparent@baylibre.com
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2020-10-24T17:44:18Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2020-10-24T17:44:18Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e533cda12d8f0e7936354bafdc85c81741f805d2'/>
<id>urn:sha1:e533cda12d8f0e7936354bafdc85c81741f805d2</id>
<content type='text'>
Pull ARM Devicetree updates from Olof Johansson:
 "As usual, most of the changes are to devicetrees.

  Besides smaller fixes, some refactorings and cleanups, some of the new
  platforms and chips (or significant features) supported are below:

  Broadcom boards:
   - Cisco Meraki MR32 (BCM53016-based)
   - BCM2711 (RPi4) display pipeline support

  Actions Semi boards:
   - Caninos Loucos Labrador SBC (S500-based)
   - RoseapplePi SBC (S500-based)

  Allwinner SoCs/boards:
   - A100 SoC with Perf1 board
   - Mali, DMA, Cetrus and IR support for R40 SoC

  Amlogic boards:
   - Libretch S905x CC V2 board
   - Hardkernel ODROID-N2+ board

  Aspeed boards/platforms:
   - Wistron Mowgli (AST2500-based, Power9 OpenPower server)
   - Facebook Wedge400 (AST2500-based, ToR switch)

  Hisilicon SoC:
   - SD5203 SoC

  Nvidia boards:
   - Tegra234 VDK, for pre-silicon Orin SoC

  NXP i.MX boards:
   - Librem 5 phone
   - i.MX8MM DDR4 EVK
   - Variscite VAR-SOM-MX8MN SoM
   - Symphony board
   - Tolino Shine 2 HD
   - TQMa6 SoM
   - Y Soft IOTA Orion

  Rockchip boards:
   - NanoPi R2S board
   - A95X-Z2 board
   - more Rock-Pi4 variants

  STM32 boards:
   - Odyssey SOM board (STM32MP157CAC-based)
   - DH DRC02 board

  Toshiba SoCs/boards:
   - Visconti SoC and TPMV7708 board"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (638 commits)
  ARM: dts: nspire: Fix SP804 users
  arm64: dts: lg: Fix SP804 users
  arm64: dts: lg: Fix SP805 clocks
  ARM: mstar: Fix up the fallout from moving the dts/dtsi files
  ARM: mstar: Add mstar prefix to all of the dtsi/dts files
  ARM: mstar: Add interrupt to pm_uart
  ARM: mstar: Add interrupt controller to base dtsi
  ARM: dts: meson8: remove two invalid interrupt lines from the GPU node
  arm64: dts: ti: k3-j7200-common-proc-board: Add USB support
  arm64: dts: ti: k3-j7200-common-proc-board: Configure the SERDES lane function
  arm64: dts: ti: k3-j7200-main: Add USB controller
  arm64: dts: ti: k3-j7200-main.dtsi: Add USB to SERDES lane MUX
  arm64: dts: ti: k3-j7200-main: Add SERDES lane control mux
  dt-bindings: ti-serdes-mux: Add defines for J7200 SoC
  ARM: dts: hisilicon: add SD5203 dts
  ARM: dts: hisilicon: fix the system controller compatible nodes
  arm64: dts: zynqmp: Fix leds subnode name for zcu100/ultra96 v1
  arm64: dts: zynqmp: Remove undocumented u-boot properties
  arm64: dts: zynqmp: Remove additional compatible string for i2c IPs
  arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml
  ...
</content>
</entry>
<entry>
<title>Merge tag 'mailbox-v5.10' of git://git.linaro.org/landing-teams/working/fujitsu/integration</title>
<updated>2020-10-18T21:29:19Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2020-10-18T21:29:19Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=373014bb517e0bb291714fe1e232fb606d54931b'/>
<id>urn:sha1:373014bb517e0bb291714fe1e232fb606d54931b</id>
<content type='text'>
Pull mailbox updates from Jassi Brar:

 - arm: implementation of mhu as a doorbell driver and conversion of
   dt-bindings to json-schema

 - mediatek: fix platform_get_irq error handling

 - bcm: convert tasklets to use new tasklet_setup api

 - core: fix race cause by hrtimer starting inappropriately

* tag 'mailbox-v5.10' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: avoid timer start from callback
  maiblox: mediatek: Fix handling of platform_get_irq() error
  mailbox: arm_mhu: Add ARM MHU doorbell driver
  mailbox: arm_mhu: Match only if compatible is "arm,mhu"
  dt-bindings: mailbox: add doorbell support to ARM MHU
  dt-bindings: mailbox : arm,mhu: Convert to Json-schema
  mailbox: bcm: convert tasklets to use new tasklet_setup() API
</content>
</entry>
<entry>
<title>dt-bindings: fix references to files converted to yaml</title>
<updated>2020-10-15T05:49:47Z</updated>
<author>
<name>Mauro Carvalho Chehab</name>
</author>
<published>2020-08-26T08:03:52Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=480017f00c6b8f843b9604a38f544a99881a67b1'/>
<id>urn:sha1:480017f00c6b8f843b9604a38f544a99881a67b1</id>
<content type='text'>
There were several files converted to yaml, but the .txt file
is still referenced somewhere else.

Update the references for them to point to the right file.

Signed-off-by: Mauro Carvalho Chehab &lt;mchehab+huawei@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: add doorbell support to ARM MHU</title>
<updated>2020-10-13T02:10:34Z</updated>
<author>
<name>Sudeep Holla</name>
</author>
<published>2020-10-08T19:14:50Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=471de2c027422b372b1bb2578aa3123ee56b7125'/>
<id>urn:sha1:471de2c027422b372b1bb2578aa3123ee56b7125</id>
<content type='text'>
The ARM MHU's reference manual states following:

"The MHU drives the signal using a 32-bit register, with all 32 bits
logically ORed together. The MHU provides a set of registers to enable
software to set, clear, and check the status of each of the bits of this
register independently.  The use of 32 bits for each interrupt line
enables software to provide more information about the source of the
interrupt. For example, each bit of the register can be associated with
a type of event that can contribute to raising the interrupt."

This patch thus extends the MHU controller's DT binding to add support
for doorbell mode.

Though the same MHU hardware controller is used in the two modes, A new
compatible string is added here to represent the combination of the MHU
hardware and the firmware sitting on the other side (which expects each
bit to represent a different signal now).

Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Co-developed-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Jassi Brar &lt;jaswinder.singh@linaro.org&gt;
</content>
</entry>
</feed>
