<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/Documentation/devicetree/bindings/crypto, branch linux-6.4.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.4.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.4.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2023-07-19T14:36:19Z</updated>
<entry>
<title>dt-bindings: qcom-qce: Fix compatible combinations for SM8150 and IPQ4019 SoCs</title>
<updated>2023-07-19T14:36:19Z</updated>
<author>
<name>Bhupesh Sharma</name>
</author>
<published>2023-05-26T19:22:04Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e539c53e3f730cd99f6c22cea58ddacb94818913'/>
<id>urn:sha1:e539c53e3f730cd99f6c22cea58ddacb94818913</id>
<content type='text'>
[ Upstream commit b3b266fa15552ba342831653f2b8b02c91451e73 ]

Currently the compatible list available in 'qce' dt-bindings does not
support SM8150 and IPQ4019 SoCs directly which may lead to potential
'dtbs_check' error(s).

Fix the same.

Fixes: 00f3bc2db351 ("dt-bindings: qcom-qce: Add new SoC compatible strings for Qualcomm QCE IP")
Reviewed-by: Vladimir Zapolskiy &lt;vladimir.zapolskiy@linaro.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Tested-by: Anders Roxell &lt;anders.roxell@linaro.org&gt;
Tested-by: Linux Kernel Functional Testing &lt;lkft@linaro.org&gt;
Signed-off-by: Bhupesh Sharma &lt;bhupesh.sharma@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Sasha Levin &lt;sashal@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux</title>
<updated>2023-04-27T16:23:57Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2023-04-27T16:23:57Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d42b1c47570eb2ed818dc3fe94b2678124af109d'/>
<id>urn:sha1:d42b1c47570eb2ed818dc3fe94b2678124af109d</id>
<content type='text'>
Pull devicetree updates from Rob Herring:
 "Bindings:

   - Convert Qcom IOMMU, Amlogic timer, Freescale sec-v4.0, Toshiba
     TC358764 display bridge, Parade PS8622 display bridge, and Xilinx
     FPGA bindings to DT schema format

   - Add qdu1000 and sa8775p SoC support to Qcom PDC interrupt
     controller

   - Add MediaTek MT8365 UART and SYSIRQ bindings

   - Add Arm Cortex-A78C and X1C core compatibles

   - Add vendor prefix for Novatek

   - Remove bindings for stih415, sti416, stid127 platforms

   - Drop uneeded quotes in schema files. This is preparation for
     yamllint checking quoting for us.

   - Add missing (unevaluated|additional)Properties constraints on child
     node schemas

   - Clean-up schema comments formatting

   - Fix I2C and SPI node bus names in schema examples

   - Clean-up some display compatibles schema syntax

   - Fix incorrect references to lvds.yaml

   - Gather all cache controller bindings in a common directory

  DT core:

   - Convert unittest to new void .remove platform device hook

   - kerneldoc fixes for DT address of_pci_range_to_resource/
     of_address_to_resource functions"

* tag 'devicetree-for-6.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (46 commits)
  dt-bindings: rng: Drop unneeded quotes
  dt-bindings: arm/soc: mediatek: Drop unneeded quotes
  dt-bindings: soc: qcom: Drop unneeded quotes
  dt-bindings: i2c: samsung: Fix 'deprecated' value
  dt-bindings: display: Fix lvds.yaml references
  dt-bindings: display: simplify compatibles syntax
  dt-bindings: display: mediatek: simplify compatibles syntax
  dt-bindings: drm/bridge: ti-sn65dsi86: Fix the video-interfaces.yaml references
  dt-bindings: timer: Drop unneeded quotes
  dt-bindings: interrupt-controller: qcom,pdc: document qcom,qdu1000-pdc
  dt-bindings: interrupt-controller: qcom-pdc: add compatible for sa8775p
  dt-bindings: reset: remove stih415/stih416 reset
  dt-bindings: net: dwmac: sti: remove stih415/sti416/stid127
  dt-bindings: irqchip: sti: remove stih415/stih416 and stid127
  dt-bindings: iommu: Convert QCOM IOMMU to YAML
  dt-bindings: irqchip: ti,sci-inta: Add optional power-domains property
  dt-bindings: Add missing (unevaluated|additional)Properties on child node schemas
  of: address: Reshuffle to remove forward declarations
  of: address: Fix documented return value of of_pci_range_to_resource()
  of: address: Document return value of of_address_to_resource()
  ...
</content>
</entry>
<entry>
<title>Merge tag 'v6.4-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6</title>
<updated>2023-04-26T15:32:52Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2023-04-26T15:32:52Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=733f7e9c18c5e377025c1bfdce6bc9a7d55649be'/>
<id>urn:sha1:733f7e9c18c5e377025c1bfdce6bc9a7d55649be</id>
<content type='text'>
Pull crypto updates from Herbert Xu:
 "API:
   - Total usage stats now include all that returned errors (instead of
     just some)
   - Remove maximum hash statesize limit
   - Add cloning support for hmac and unkeyed hashes
   - Demote BUG_ON in crypto_unregister_alg to a WARN_ON

  Algorithms:
   - Use RIP-relative addressing on x86 to prepare for PIE build
   - Add accelerated AES/GCM stitched implementation on powerpc P10
   - Add some test vectors for cmac(camellia)
   - Remove failure case where jent is unavailable outside of FIPS mode
     in drbg
   - Add permanent and intermittent health error checks in jitter RNG

  Drivers:
   - Add support for 402xx devices in qat
   - Add support for HiSTB TRNG
   - Fix hash concurrency issues in stm32
   - Add OP-TEE firmware support in caam"

* tag 'v6.4-p1' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (139 commits)
  i2c: designware: Add doorbell support for Mendocino
  i2c: designware: Use PCI PSP driver for communication
  powerpc: Move Power10 feature PPC_MODULE_FEATURE_P10
  crypto: p10-aes-gcm - Remove POWER10_CPU dependency
  crypto: testmgr - Add some test vectors for cmac(camellia)
  crypto: cryptd - Add support for cloning hashes
  crypto: cryptd - Convert hash to use modern init_tfm/exit_tfm
  crypto: hmac - Add support for cloning
  crypto: hash - Add crypto_clone_ahash/shash
  crypto: api - Add crypto_clone_tfm
  crypto: api - Add crypto_tfm_get
  crypto: x86/sha - Use local .L symbols for code
  crypto: x86/crc32 - Use local .L symbols for code
  crypto: x86/aesni - Use local .L symbols for code
  crypto: x86/sha256 - Use RIP-relative addressing
  crypto: x86/ghash - Use RIP-relative addressing
  crypto: x86/des3 - Use RIP-relative addressing
  crypto: x86/crc32c - Use RIP-relative addressing
  crypto: x86/cast6 - Use RIP-relative addressing
  crypto: x86/cast5 - Use RIP-relative addressing
  ...
</content>
</entry>
<entry>
<title>dt-bindings: crypto: Add Qualcomm Inline Crypto Engine</title>
<updated>2023-04-07T19:21:27Z</updated>
<author>
<name>Abel Vesa</name>
</author>
<published>2023-04-07T10:50:24Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=f6ff91a47ac57cb1118d94020302617b6b22c0d1'/>
<id>urn:sha1:f6ff91a47ac57cb1118d94020302617b6b22c0d1</id>
<content type='text'>
Add schema file for new Qualcomm Inline Crypto Engine driver.

Signed-off-by: Abel Vesa &lt;abel.vesa@linaro.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Eric Biggers &lt;ebiggers@google.com&gt;
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Link: https://lore.kernel.org/r/20230407105029.2274111-2-abel.vesa@linaro.org
</content>
</entry>
<entry>
<title>dt-bindings: crypto: sec-v4.0-mon: add snvs power off support</title>
<updated>2023-04-04T17:12:12Z</updated>
<author>
<name>Peng Fan</name>
</author>
<published>2023-03-23T12:39:07Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=ef998faf9fc343fd170dbfe3eafcb82f80a4cfe6'/>
<id>urn:sha1:ef998faf9fc343fd170dbfe3eafcb82f80a4cfe6</id>
<content type='text'>
Add SNVS power off support. The SNVS_LP LPCR register could
drive signal to PMIC to turn off system power.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Link: https://lore.kernel.org/r/20230323123907.103719-1-peng.fan@oss.nxp.com
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: crypto: fsl,sec-v4.0: Convert to DT schema</title>
<updated>2023-03-17T21:31:20Z</updated>
<author>
<name>Rob Herring</name>
</author>
<published>2023-02-20T21:33:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0415d5a010d5273afc8b069eedb68cb1250e1b4b'/>
<id>urn:sha1:0415d5a010d5273afc8b069eedb68cb1250e1b4b</id>
<content type='text'>
Convert Freescale CAAM/SEC4 binding to DT schema format. The
'fsl,sec-v4.0' and 'fsl,sec-v4.0-mon' parts are independent, so split
them into separate schema files.

Add a bunch of missing compatibles for v5.0, v5.4, etc. Drop unused
'ranges', '#address-cells', and '#size-cells' from fsl,sec-v4.0-mon nodes.

There's one DTB warning for LS1012a which has a 2nd 'reg' entry for
'fsl,sec-v4.0-rtic'. Leaving that as there is no clue as to what it is for.

Reviewed-by: Gaurav Jain &lt;gaurav.jain@nxp.com&gt;
Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Link: https://lore.kernel.org/r/20230220213334.353779-1-robh@kernel.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: qcom-qce: document optional clocks and clock-names properties</title>
<updated>2023-03-14T09:06:43Z</updated>
<author>
<name>Vladimir Zapolskiy</name>
</author>
<published>2023-02-22T17:22:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=faf8cced333be38d30dcc69ecf33475a10dd8e21'/>
<id>urn:sha1:faf8cced333be38d30dcc69ecf33475a10dd8e21</id>
<content type='text'>
On newer Qualcomm SoCs the crypto engine clocks are enabled by default
by security firmware. To drop clocks and clock-names from the list of
required properties use 'qcom,sm8150-qce' compatible name.

The change is based on Neil Armstrong's observation and an original change.

Cc: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Signed-off-by: Vladimir Zapolskiy &lt;vladimir.zapolskiy@linaro.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>dt-bindings: qcom-qce: Add new SoC compatible strings for Qualcomm QCE IP</title>
<updated>2023-03-14T09:06:43Z</updated>
<author>
<name>Vladimir Zapolskiy</name>
</author>
<published>2023-02-22T17:22:35Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=00f3bc2db351911700b3e951227e124a03b8a0bf'/>
<id>urn:sha1:00f3bc2db351911700b3e951227e124a03b8a0bf</id>
<content type='text'>
Introduce a generic IP family compatible 'qcom,qce' and its two derivatives
based on SoC names rather than on IP versions. Having a generic compatible
is only partially sufficient, the QCE IP version can be discovered in
runtime, however there are two known groups of QCE IP versions, which
require different DT properties, these two groups are populated with SoC
based compatibles known at the moment.

Keep the old compatible 'qcom,crypto-v5.1' and document an existing and
already used but not previously documented compatible 'qcom,crypto-v5.4'
for backward compatibility of DTB ABI, mark both of the compatibles as
deprecated.

The change is based on the original one written by Bhupesh Sharma, adding
a generic family compatible is suggested by Neil Armstrong.

Cc: Bhupesh Sharma &lt;bhupesh.sharma@linaro.org&gt;
Cc: Neil Armstrong &lt;neil.armstrong@linaro.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Vladimir Zapolskiy &lt;vladimir.zapolskiy@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>dt-bindings: qcom-qce: Add 'iommus' to optional properties</title>
<updated>2023-03-14T09:06:43Z</updated>
<author>
<name>Bhupesh Sharma</name>
</author>
<published>2023-02-22T17:22:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=c168dc4b513b66e24ff70800203406c41579ace2'/>
<id>urn:sha1:c168dc4b513b66e24ff70800203406c41579ace2</id>
<content type='text'>
Add the missing optional property - 'iommus' to the
device-tree binding documentation for qcom-qce crypto IP.

This property describes the phandle(s) to apps_smmu node with sid mask.

Cc: Bjorn Andersson &lt;andersson@kernel.org&gt;
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Tested-by: Jordan Crouse &lt;jorcrous@amazon.com&gt;
Signed-off-by: Bhupesh Sharma &lt;bhupesh.sharma@linaro.org&gt;
Signed-off-by: Vladimir Zapolskiy &lt;vladimir.zapolskiy@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>dt-bindings: qcom-qce: Add 'interconnects' and 'interconnect-names'</title>
<updated>2023-03-14T09:06:43Z</updated>
<author>
<name>Bhupesh Sharma</name>
</author>
<published>2023-02-22T17:22:33Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1727c0ed50a6d94af5042dd02752a4264be5dc98'/>
<id>urn:sha1:1727c0ed50a6d94af5042dd02752a4264be5dc98</id>
<content type='text'>
Add 'interconnects' and 'interconnect-names' as optional properties
to the device-tree binding documentation for Qualcomm crypto IP.

These properties describe the interconnect path between crypto and main
memory and the interconnect type respectively.

Cc: Bjorn Andersson &lt;andersson@kernel.org&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Tested-by: Jordan Crouse &lt;jorcrous@amazon.com&gt;
Signed-off-by: Bhupesh Sharma &lt;bhupesh.sharma@linaro.org&gt;
Signed-off-by: Vladimir Zapolskiy &lt;vladimir.zapolskiy@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
</feed>
