kernel.git/Documentation/devicetree/bindings/cpufreq, branch linux-6.4.yHosts the 0x221E linux distro kernel.
https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.4.y2023-03-30T03:58:56Zdt-bindings: cpufreq: cpufreq-qcom-hw: Add QCM22902023-03-30T03:58:56ZKonrad Dybcio2023-03-08T01:27:00Zurn:sha1:e69003202434131510ab18acda7d251b1975ecb1
Document the OSM CPUFREQ_HW present on QCM2290, featuring just one
lonely frequency domain.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
dt-bindings: cpufreq: cpufreq-qcom-hw: Sanitize data per compatible2023-03-30T03:58:56ZKonrad Dybcio2023-03-08T01:26:59Zurn:sha1:7ae24e054f753ff40ca1adaa631edd7476590a5f
Introduce per-SoC compatibles for OSM targets (read: pre-sm8250) and
sanitize the number of interrupt{s,-names} and reg/-names per-compatible.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
dt-bindings: cpufreq: cpufreq-qcom-hw: Allow just 1 frequency domain2023-03-30T03:58:56ZKonrad Dybcio2023-03-08T01:26:58Zurn:sha1:287143d886961194c23c98ebbde5c0fad39e12b8
Some SoCs implementing CPUFREQ-HW only have a single frequency domain.
Allow such case.
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
dt-bindings: cpufreq: qcom-hw: add a compatible for sa8775p2023-03-13T04:27:42ZBartosz Golaszewski2023-02-21T15:05:42Zurn:sha1:7911b6a868ea1fc7e4e4929edaee312a2f061905
Add the compatible for the cpufreq engine present on sa8775p platforms.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
Merge tag 'cpufreq-arm-updates-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm2023-02-14T14:25:07ZRafael J. Wysocki2023-02-14T14:25:07Zurn:sha1:f0f8e9e730b84dd9255343dc6b2cbd6ecc3a08e0
Pull cpufreq ARM updates for 6.3 from Viresh Kumar:
"- Enable thermal cooling for Tegra194 (Yi-Wei Wang).
- Register module device table and add missing compatibles for
cpufreq-qcom-hw (Nícolas F. R. A. Prado, Abel Vesa and Luca Weiss).
- Various dt binding updates for qcom-cpufreq-nvmem and opp-v2-kryo-cpu
(Christian Marangi)."
* tag 'cpufreq-arm-updates-6.3' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
dt-bindings: opp: opp-v2-kryo-cpu: enlarge opp-supported-hw maximum
dt-bindings: cpufreq: qcom-cpufreq-nvmem: make cpr bindings optional
dt-bindings: cpufreq: qcom-cpufreq-nvmem: specify supported opp tables
dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM8550 compatible
dt-bindings: cpufreq: cpufreq-qcom-hw: Add missing compatibles
cpufreq: mediatek-hw: Register to module device table
cpufreq: tegra194: Enable CPUFREQ thermal cooling
dt-bindings: cpufreq: qcom-cpufreq-nvmem: make cpr bindings optional2023-02-14T05:21:58ZChristian Marangi2023-02-08T15:39:12Zurn:sha1:389de9c5a677c0d950528ee7d1871366ad2a6fd8
The qcom-cpufreq-nvmem driver supports 2 kind of devices:
- pre-cpr that doesn't have power-domains and base everything on nvmem
cells and multiple named microvolt bindings.
Doesn't need required-opp binding in the opp nodes as they are only
used for genpd based devices.
- cpr-based that require power-domain in the cpu nodes and use various
source to decide the correct voltage and freq
Require required-opp binding since they need to be linked to the
related opp-level.
When the schema was introduced, it was wrongly set to always require these
binding but this is not the case for pre-cpr devices.
Make the power-domain and the required-opp optional and set them required
only for qcs404 based devices.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
dt-bindings: cpufreq: qcom-cpufreq-nvmem: specify supported opp tables2023-02-14T05:21:58ZChristian Marangi2023-02-08T15:39:11Zurn:sha1:26e27f4e382f126d80e230df2a76d5f1c5a1ac42
Add additional info on what opp tables the defined devices in this schema
supports (operating-points-v2-kryo-cpu and operating-points-v2-qcom-level)
and reference them.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
dt-bindings: cpufreq: cpufreq-qcom-hw: Add SM8550 compatible2023-02-06T04:01:39ZAbel Vesa2023-01-30T12:30:46Zurn:sha1:8e6cb91f946a059c3714c6d7f0e43e313f389183
Add compatible for EPSS CPUFREQ-HW on SM8550.
Also document the interrupts.
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
dt-bindings: cpufreq: cpufreq-qcom-hw: Add missing compatibles2023-02-06T04:01:39ZLuca Weiss2022-10-16T09:00:30Zurn:sha1:fa68d9c5ff765318adf8e46ff1d89539a8546a0d
Document the cpufreq-epss compatibles currently used in the tree, plus
the sc7280 which will be added in a separate commit.
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
dt-bindings: cpufreq: cpufreq-qcom-hw: document interrupts2023-01-04T06:36:24ZKrzysztof Kozlowski2022-12-27T14:42:02Zurn:sha1:53cd37c1368d07649421517ed0aab94a49cca003
The Qualcomm Soc cpufreq hardware engine has LMh/thermal throttling
interrupts (already present in SM8250 and SM8450 DTS) and Linux driver
uses them:
sm8250-hdk.dtb: cpufreq@18591000: 'interrupt-names', 'interrupts' do not match any of the regexes: 'pinctrl-[0-9]+'
sm8450-qrd.dtb: cpufreq@17d91000: 'interrupt-names', 'interrupts' do not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>