<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/Documentation/devicetree/bindings/clock, branch linux-6.15.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.15.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-6.15.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2025-07-17T16:43:53Z</updated>
<entry>
<title>dt-bindings: clock: mediatek: Add #reset-cells property for MT8188</title>
<updated>2025-07-17T16:43:53Z</updated>
<author>
<name>Julien Massot</name>
</author>
<published>2025-05-16T14:12:13Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=91aaa4b4a5368993b0315fc7d070eeb24da98d73'/>
<id>urn:sha1:91aaa4b4a5368993b0315fc7d070eeb24da98d73</id>
<content type='text'>
commit a42b4dcc4f9f309a23e6de5ae57a680b9fd2ea10 upstream.

The '#reset-cells' property is permitted for some of the MT8188
clock controllers, but not listed as a valid property.

Fixes: 9a5cd59640ac ("dt-bindings: clock: mediatek: Add SMI LARBs reset for MT8188")
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Signed-off-by: Julien Massot &lt;julien.massot@collabora.com&gt;
Link: https://lore.kernel.org/r/20250516-dtb-check-mt8188-v2-1-fb60bef1b8e1@collabora.com
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux</title>
<updated>2025-03-30T00:23:34Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2025-03-30T00:23:34Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=59c35416f4246aee66b5f5523fdc950b83325d82'/>
<id>urn:sha1:59c35416f4246aee66b5f5523fdc950b83325d82</id>
<content type='text'>
Pull clk updates from Stephen Boyd:
 "Here's the pile of clk driver patches. The usual suspects^Wsilicon
  vendors are all here, adding new SoC support and fixing existing code.

  There are a few patches to the clk framework here as well. They've
  been baking in linux-next for weeks so I'm hoping we don't have to
  revert them. The disable OF node patch is probably the scariest one
  although it seems unlikely that a system would be relying on a driver
  _not_ probing because the clk never appeared, but you never know.

  Nothing looks out of the ordinary on the driver side but that's
  because it's mostly a bunch of data.

  Core:
   - Use dev_err_probe() in the clk registration path (Peering into the
     crystal ball shows many patches that remove printks)
   - Check for disabled OF nodes in of_clk_get_hw_from_clkspec()

  New Drivers:
   - Allwinner A523/T527 clk driver
   - Qualcomm IPQ9574 NSS clk driver
   - Qualcomm QCS8300 GPU and video clk drivers
   - Qualcomm SDM429 RPM clks
   - Qualcomm QCM6490 LPASS (low power audio) resets
   - Samsung Exynos2200: driver for several clock controllers (Alive,
     CMGP, HSI, PERIC/PERIS, TOP, UFS and VFS)
   - Samsung Exynos7870: Driver for several clock controllers (Alive,
     MIF, DISP AUD, FSYS, G3D, ISP, MFC and PERI)
   - Rockchip rk3528 and rk3562 clk driver

  Updates:
   - Various fixes to SoC clk drivers for incorrect data, avoid touching
     protected registers, etc.
   - Additions for some missing clks in existing SoC clk drivers
   - DT schema conversions from text to YAML
   - Kconfig cleanups to allow drivers to be compiled on moar
     architectures"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (125 commits)
  clk: qcom: Add NSS clock Controller driver for IPQ9574
  clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clock
  dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions
  dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX
  clk: qcom: gcc-msm8953: fix stuck venus0_core0 clock
  clk: qcom: mmcc-sdm660: fix stuck video_subcore0 clock
  dt-bindings: clock: qcom,x1e80100-camcc: Fix the list of required-opps
  clk: amlogic: a1: fix a typo
  clk: amlogic: gxbb: drop non existing 32k clock parent
  clk: amlogic: gxbb: drop incorrect flag on 32k clock
  clk: amlogic: g12b: fix cluster A parent data
  clk: amlogic: g12a: fix mmc A peripheral clock
  dt-bindings: clocks: atmel,at91rm9200-pmc: add missing compatibles
  dt-bindings: reset: fix double id on rk3562-cru reset ids
  drivers: clk: qcom: ipq5424: fix the freq table of sdcc1_apps clock
  clk: qcom: lpassaudiocc-sc7280: Add support for LPASS resets for QCM6490
  dt-bindings: clock: qcom: Add compatible for QCM6490 boards
  clk: qcom: gdsc: Update the status poll timeout for GDSC
  clk: qcom: gdsc: Set retain_ff before moving to HW CTRL
  clk: davinci: remove support for da830
  ...
</content>
</entry>
<entry>
<title>Merge tag 'mips_6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux</title>
<updated>2025-03-29T19:47:09Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2025-03-29T19:47:09Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=1c83601b8ffc1b4ba8dc7f35151131707a8a5ae7'/>
<id>urn:sha1:1c83601b8ffc1b4ba8dc7f35151131707a8a5ae7</id>
<content type='text'>
Pull MIPS updates from Thomas Bogendoerfer:

 - Add support for multi-cluster configuration

 - Add quirks for enabling multi-cluster mode on EyeQ6

 - Add DTS clocks for ralink

 - Cleanup realtek DTS

 - Other cleanups and fixes

* tag 'mips_6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (35 commits)
  MIPS: config: omega2+, vocore2: enable CLK_MTMIPS
  arch: mips: defconfig: Drop obsolete CONFIG_NET_CLS_TCINDEX
  MIPS: cm: Fix warning if MIPS_CM is disabled
  MIPS: Fix Macro name
  MIPS: ds1287: Match ds1287_set_base_clock() function types
  MIPS: cevt-ds1287: Add missing ds1287.h include
  MIPS: dec: Declare which_prom() as static
  MIPS: Loongson2ef: Replace deprecated strncpy() with strscpy()
  mips: dts: ralink: mt7628a: update system controller node and its consumers
  mips: dts: ralink: mt7620a: update system controller node and its consumers
  mips: dts: ralink: rt3883: update system controller node and its consumers
  mips: dts: ralink: rt3050: update system controller node and its consumers
  mips: dts: ralink: rt2880: update system controller node and its consumers
  dt-bindings: clock: add clock definitions for Ralink SoCs
  MIPS: Use arch specific syscall name match function
  mips: dts: realtek: Add restart to Cisco SG220-26P
  mips: dts: realtek: Add RTL838x SoC peripherals
  mips: dts: realtek: Replace uart clock property
  mips: dts: realtek: Correct uart interrupt-parent
  mips: dts: realtek: Add SoC IRQ node for RTL838x
  ...
</content>
</entry>
<entry>
<title>Merge branches 'clk-allwinner', 'clk-amlogic' and 'clk-qcom' into clk-next</title>
<updated>2025-03-26T18:26:36Z</updated>
<author>
<name>Stephen Boyd</name>
</author>
<published>2025-03-26T18:26:36Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e988adcb5dee697a046f0270747c9409c41e8e2a'/>
<id>urn:sha1:e988adcb5dee697a046f0270747c9409c41e8e2a</id>
<content type='text'>
* clk-allwinner:
  clk: sunxi-ng: add support for the A523/T527 PRCM CCU
  clk: sunxi-ng: a523: add reset lines
  clk: sunxi-ng: a523: add bus clock gates
  clk: sunxi-ng: a523: remaining mod clocks
  clk: sunxi-ng: a523: add USB mod clocks
  clk: sunxi-ng: a523: add interface mod clocks
  clk: sunxi-ng: a523: add system mod clocks
  clk: sunxi-ng: a523: add video mod clocks
  clk: sunxi-ng: a523: Add support for bus clocks
  clk: sunxi-ng: Add support for the A523/T527 CCU PLLs
  dt-bindings: clk: sunxi-ng: document two Allwinner A523 CCUs
  clk: sunxi-ng: Add support for update bit
  clk: sunxi-ng: mp: provide wrappers for setting feature flags
  clk: sunxi-ng: mp: introduce dual-divider clock
  clk: sunxi-ng: h616: Reparent GPU clock during frequency changes
  clk: sunxi-ng: h616: Add clock/reset for LCD TCON
  dt-bindings: clock: sun50i-h616-ccu: Add LCD TCON clk and reset

* clk-amlogic:
  clk: amlogic: a1: fix a typo
  clk: amlogic: gxbb: drop non existing 32k clock parent
  clk: amlogic: gxbb: drop incorrect flag on 32k clock
  clk: amlogic: g12b: fix cluster A parent data
  clk: amlogic: g12a: fix mmc A peripheral clock

* clk-qcom: (41 commits)
  clk: qcom: Add NSS clock Controller driver for IPQ9574
  clk: qcom: gcc-ipq9574: Add support for gpll0_out_aux clock
  dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions
  dt-bindings: clock: gcc-ipq9574: Add definition for GPLL0_OUT_AUX
  clk: qcom: gcc-msm8953: fix stuck venus0_core0 clock
  clk: qcom: mmcc-sdm660: fix stuck video_subcore0 clock
  dt-bindings: clock: qcom,x1e80100-camcc: Fix the list of required-opps
  drivers: clk: qcom: ipq5424: fix the freq table of sdcc1_apps clock
  clk: qcom: lpassaudiocc-sc7280: Add support for LPASS resets for QCM6490
  dt-bindings: clock: qcom: Add compatible for QCM6490 boards
  clk: qcom: gdsc: Update the status poll timeout for GDSC
  clk: qcom: gdsc: Set retain_ff before moving to HW CTRL
  clk: qcom: gcc-sm8650: Do not turn off USB GDSCs during gdsc_disable()
  clk: qcom: videocc: Constify 'struct qcom_cc_desc'
  clk: qcom: gpucc: Constify 'struct qcom_cc_desc'
  clk: qcom: dispcc: Constify 'struct qcom_cc_desc'
  clk: qcom: camcc: Constify 'struct qcom_cc_desc'
  dt-bindings: clock: qcom: sm8450-camcc: Remove qcom,x1e80100-camcc leftover
  clk: qcom: Add support for Video Clock Controller on QCS8300
  clk: qcom: Add support for GPU Clock Controller on QCS8300
  ...
</content>
</entry>
<entry>
<title>Merge branches 'clk-rockchip', 'clk-samsung' and 'clk-imx' into clk-next</title>
<updated>2025-03-26T18:26:32Z</updated>
<author>
<name>Stephen Boyd</name>
</author>
<published>2025-03-26T18:26:32Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3ce2e14a5b7e9eddb7234e9f1e2cddd34fbcce23'/>
<id>urn:sha1:3ce2e14a5b7e9eddb7234e9f1e2cddd34fbcce23</id>
<content type='text'>
* clk-rockchip:
  dt-bindings: reset: fix double id on rk3562-cru reset ids
  clk: rockchip: Add clock controller for the RK3562
  dt-bindings: clock: Add RK3562 cru
  clk: rockchip: rk3528: Add reset lookup table
  clk: rockchip: Add clock controller driver for RK3528 SoC
  clk: rockchip: Add PLL flag ROCKCHIP_PLL_FIXED_MODE
  dt-bindings: clock: Document clock and reset unit of RK3528
  clk: rockchip: rk3328: fix wrong clk_ref_usb3otg parent
  clk: rockchip: rk3568: mark hclk_vi as critical
  clk: rockchip: rk3188: use PCLK_CIF0/1 clock IDs on RK3066
  dt-bindings: clock: rk3188-common: add PCLK_CIF0/PCLK_CIF1

* clk-samsung:
  clk: samsung: Drop unused clk.h and of.h headers
  clk: samsung: Add missing mod_devicetable.h header
  clk: samsung: add initial exynos7870 clock driver
  clk: samsung: introduce Exynos2200 clock driver
  clk: samsung: clk-pll: add support for pll_4311
  dt-bindings: clock: add clock definitions and documentation for exynos7870 CMU
  dt-bindings: clock: add Exynos2200 SoC
  clk: samsung: Fix UBSAN panic in samsung_clk_init()
  clk: samsung: Fix spelling mistake "stablization" -&gt; "stabilization"
  clk: samsung: exynos990: Add CMU_PERIS block
  dt-bindings: clock: exynos990: Add CMU_PERIS block

* clk-imx:
  clk: imx8mp: inform CCF of maximum frequency of clocks
  dt-bindings: clock: imx8m: document nominal/overdrive properties
  clk: clk-imx8mp-audiomix: fix dsp/ocram_a clock parents
  dt-bindings: clock: imx8mp: add axi clock
</content>
</entry>
<entry>
<title>Merge branches 'clk-parent', 'clk-renesas', 'clk-mediatek' and 'clk-cleanup' into clk-next</title>
<updated>2025-03-26T18:26:26Z</updated>
<author>
<name>Stephen Boyd</name>
</author>
<published>2025-03-26T18:26:26Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=316f4b91f92fd1863f445a5d33c65c4e51de96e7'/>
<id>urn:sha1:316f4b91f92fd1863f445a5d33c65c4e51de96e7</id>
<content type='text'>
* clk-parent:
  clk: check for disabled clock-provider in of_clk_get_hw_from_clkspec()

* clk-renesas: (24 commits)
  clk: renesas: r9a09g047: Add clock and reset signals for the TSU IP
  clk: renesas: rzv2h: Adjust for CPG_BUS_m_MSTOP starting from m = 1
  clk: renesas: r7s9210: Distinguish clocks by clock type
  clk: renesas: rzg2l: Remove unneeded nullify checks
  clk: renesas: cpg-mssr: Remove obsolete nullify check
  clk: renesas: r9a09g057: Add entries for the DMACs
  clk: renesas: r9a09g047: Add CANFD clocks and resets
  clk: renesas: r9a09g047: Add CRU0 clocks and resets
  clk: renesas: rzv2h: Update error message
  clk: renesas: rzg2l: Update error message
  clk: renesas: r9a09g047: Add ICU clock/reset
  clk: renesas: r9a07g043: Fix HP clock source for RZ/Five
  clk: renesas: r9a09g047: Add SDHI clocks/resets
  clk: renesas: r8a779h0: Add VSPX clock
  clk: renesas: r8a779h0: Add FCPVX clock
  clk: renesas: r8a08g045: Check the source of the CPU PLL settings
  clk: renesas: r9a09g047: Add WDT clocks and resets
  clk: renesas: r8a779h0: Add ISP core clocks
  clk: renesas: r8a779g0: Add ISP core clocks
  clk: renesas: r8a779a0: Add ISP core clocks
  ...

* clk-mediatek:
  clk: mediatek: Add SMI LARBs reset for MT8188
  dt-bindings: clock: mediatek: Add SMI LARBs reset for MT8188
  clk: mediatek: mt8188-vdo1: Add VDO1_DPI1_HDMI clock for hdmitx
  dt-bindings: clock: mediatek,mt8188: Add VDO1_DPI1_HDMI clock

* clk-cleanup:
  dt-bindings: clocks: atmel,at91rm9200-pmc: add missing compatibles
  clk: davinci: remove support for da830
  dt-bindings: clock: ti: Convert ti-clkctrl.txt to json-schema
  clk: mmp: Fix NULL vs IS_ERR() check
  clk: Print an error when clk registration fails
  clk: Correct the data types of the variables in clk_calc_new_rates
  clk: imgtec: use %pe for better readability of errors while printing
  clk: stm32f4: fix an uninitialized variable
  clk: keystone: syscon-clk: Do not use syscon helper to build regmap
</content>
</entry>
<entry>
<title>Merge branch '20250313110359.242491-1-quic_mmanikan@quicinc.com' into clk-for-6.15</title>
<updated>2025-03-17T15:10:46Z</updated>
<author>
<name>Bjorn Andersson</name>
</author>
<published>2025-03-17T15:10:46Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=0139f7d4e50176d7d4f821c8cc1c65e44c41fd6f'/>
<id>urn:sha1:0139f7d4e50176d7d4f821c8cc1c65e44c41fd6f</id>
<content type='text'>
Merge the IPQ9574 NSSCC binding through a topic branch, to allow them to
also be merged and used in the DeviceTree source tree.
</content>
</entry>
<entry>
<title>dt-bindings: clock: Add ipq9574 NSSCC clock and reset definitions</title>
<updated>2025-03-17T15:10:37Z</updated>
<author>
<name>Devi Priya</name>
</author>
<published>2025-03-13T11:03:56Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=28300ecedce41dad239e0779d0b640349db33ec6'/>
<id>urn:sha1:28300ecedce41dad239e0779d0b640349db33ec6</id>
<content type='text'>
Add NSSCC clock and reset definitions for ipq9574.

Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Signed-off-by: Devi Priya &lt;quic_devipriy@quicinc.com&gt;
Signed-off-by: Manikanta Mylavarapu &lt;quic_mmanikan@quicinc.com&gt;
Link: https://lore.kernel.org/r/20250313110359.242491-4-quic_mmanikan@quicinc.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: qcom,x1e80100-camcc: Fix the list of required-opps</title>
<updated>2025-03-17T02:28:31Z</updated>
<author>
<name>Vladimir Zapolskiy</name>
</author>
<published>2025-03-04T14:31:52Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=d547913e87a6a40b8690c069492cddc0cef6c573'/>
<id>urn:sha1:d547913e87a6a40b8690c069492cddc0cef6c573</id>
<content type='text'>
The switch to multiple power domains implies that the required-opps
property shall be updated accordingly, a record in one property
corresponds to a record in another one.

Fixes: 7ec95ff9abf4 ("dt-bindings: clock: move qcom,x1e80100-camcc to its own file")
Signed-off-by: Vladimir Zapolskiy &lt;vladimir.zapolskiy@linaro.org&gt;
Reviewed-by: Bryan O'Donoghue &lt;bryan.odonoghue@linaro.org&gt;
Link: https://lore.kernel.org/r/20250304143152.1799966-1-vladimir.zapolskiy@linaro.org
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'samsung-dt64-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt</title>
<updated>2025-03-14T17:47:13Z</updated>
<author>
<name>Arnd Bergmann</name>
</author>
<published>2025-03-14T17:47:08Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=56beaf14443d42753b98b224b8a790064edade01'/>
<id>urn:sha1:56beaf14443d42753b98b224b8a790064edade01</id>
<content type='text'>
Samsung DTS ARM64 changes for v6.15

1. Google GS101:
 - Disable GSA core pinctrl because its registers are not available for
   normal world.
 - Add APM (Active Power Management) mailbox and the ACPM firmware nodes.
 - Add new boards: Google Pixel 6 Pro (Raven).
 - Enable framebuffer and reboot-mode.

2. Exynos990:
 - Add PERIS clock controller, MCT timer

3. Exynos8895:
 - Define all remaining serial engine (USI) and syscon nodes, add MMC.
 - Enable microSD and touchsreen on Samsung Galaxy S8 (dreamlte).

4. ExynosAutov920: Add UFS and CPU cache information.

5. Various cleanups.

This includes two topic branches with DT bindings, which might be shared
with other trees depending on needs:
1. for-v6.15/samsung-clk-dt-bindings with Exynos990 clock controller
   header constants.
2. for-v6.15/samsung-soc-dt-bindings with Exynos USI serial engines
   header constants rework.

* tag 'samsung-dt64-6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: (25 commits)
  arm64: dts: tesla: Change labels to lower-case
  arm64: dts: exynos: gs101: Change labels to lower-case
  arm64: dts: exynosautov920: add ufs phy for ExynosAutov920 SoC
  arm64: dts: exynosautov920: add CPU cache information
  arm64: dts: exynos: gs101: add ACPM protocol node
  arm64: dts: exynos: gs101: add AP to APM mailbox node
  arm64: dts: exynos: gs101: add SRAM node
  arm64: dts: exynos: gs101: add reboot-mode support (SYSIP_DAT0)
  arm64: dts: exynos: gs101: align poweroff writes with downstream
  arm64: dts: exynos: gs101: drop explicit regmap from reboot nodes
  arm64: dts: exynos8895: Rename PMU nodes to fixup sorting
  arm64: dts: exynos8895-dreamlte: enable support for the touchscreen
  arm64: dts: exynos8895-dreamlte: enable support for microSD storage
  arm64: dts: exynos8895: add a node for mmc
  arm64: dts: exynos8895: define all usi nodes
  arm64: dts: exynos8895: add syscon nodes for peric0/1 and fsys0/1
  arm64: dts: exynos990: Rename and sort PMU nodes
  arm64: dts: exynos990: Add CMU_PERIS and MCT nodes
  dt-bindings: soc: samsung: usi: add USIv1 and samsung,exynos8895-usi
  dt-bindings: clock: exynos990: Add CMU_PERIS block
  ...

Link: https://lore.kernel.org/r/20250309185601.10616-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
</feed>
