<feed xmlns='http://www.w3.org/2005/Atom'>
<title>kernel.git/Documentation/devicetree/bindings/bus, branch linux-4.9.y</title>
<subtitle>Hosts the 0x221E linux distro kernel.
</subtitle>
<id>https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.9.y</id>
<link rel='self' href='https://git.0xinfinity.dev/distro/kernel.git/atom?h=linux-4.9.y'/>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/'/>
<updated>2016-09-08T13:26:21Z</updated>
<entry>
<title>bus: qcom: add EBI2 device tree bindings</title>
<updated>2016-09-08T13:26:21Z</updated>
<author>
<name>Linus Walleij</name>
</author>
<published>2016-07-07T22:09:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7e525b7dac5849c394513e321105add5d2cbc358'/>
<id>urn:sha1:7e525b7dac5849c394513e321105add5d2cbc358</id>
<content type='text'>
This adds device tree bindings for the External Bus Interface 2, EBI2
to the Qualcomm SoC drivers.

Cc: devicetree@vger.kernel.org
Acked-by: Rob Herring &lt;robh+dt@kernel.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: bus: Add documentation for Tegra210 ACONNECT</title>
<updated>2016-07-01T14:35:43Z</updated>
<author>
<name>Jon Hunter</name>
</author>
<published>2016-06-17T12:40:31Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=894b68e1941fa572a97dc059865e5669ecaa3b4a'/>
<id>urn:sha1:894b68e1941fa572a97dc059865e5669ecaa3b4a</id>
<content type='text'>
Add binding documentation for the Tegra ACONNECT bus that is part of the
Audio Processing Engine (APE) on Tegra210. The ACONNECT bus is used to
access devices within the APE subsystem. The APE is located in a
separate power domain and so accesses made to the ACONNECT require the
power domain to be enabled as well as some platform specific clocks.

Signed-off-by: Jon Hunter &lt;jonathanh@nvidia.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Thierry Reding &lt;treding@nvidia.com&gt;
</content>
</entry>
<entry>
<title>memory: omap-gpmc: Move device tree binding to correct location</title>
<updated>2016-04-15T08:54:03Z</updated>
<author>
<name>Roger Quadros</name>
</author>
<published>2015-08-05T14:01:54Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=3c76f6119a64eb8ff6d088ceb6ca03891e29a7ce'/>
<id>urn:sha1:3c76f6119a64eb8ff6d088ceb6ca03891e29a7ce</id>
<content type='text'>
omap-gpmc.c is a memory controller so move the binding to the
right place.

Signed-off-by: Roger Quadros &lt;rogerq@ti.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
</entry>
<entry>
<title>memory: omap-gpmc: Implement IRQ domain for NAND IRQs</title>
<updated>2016-04-15T08:52:28Z</updated>
<author>
<name>Roger Quadros</name>
</author>
<published>2015-07-30T11:49:23Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=384258f252727c67772bbd48dad3185a30ba50d3'/>
<id>urn:sha1:384258f252727c67772bbd48dad3185a30ba50d3</id>
<content type='text'>
GPMC provides 2 interrupts for NAND use. i.e. fifoevent and termcount.
Use IRQ domain for this. NAND device tree node can then
get the necessary interrupts by using gpmc as the interrupt parent.

Legacy boot uses gpmc_get_client_irq to get the
NAND interrupts from the GPMC IRQ domain.
Get rid of custom bitmasks and use IRQ domain for that
as well.

Signed-off-by: Roger Quadros &lt;rogerq@ti.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: bus: ti-gpmc: Add AAD timings properties</title>
<updated>2016-02-08T14:22:03Z</updated>
<author>
<name>Neil Armstrong</name>
</author>
<published>2015-12-28T13:39:21Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=e116c0545d17be6cc95a559aa5a68c221330501b'/>
<id>urn:sha1:e116c0545d17be6cc95a559aa5a68c221330501b</id>
<content type='text'>
In order to support advanced AAD timings, add these properties to the DT
GPMC bindings.

Signed-off-by: Neil Armstrong &lt;narmstrong@baylibre.com&gt;
Acked-by: Tony Lindgren &lt;tony@atomide.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Roger Quadros &lt;rogerq@ti.com&gt;
</content>
</entry>
<entry>
<title>bus: uniphier-system-bus: add UniPhier System Bus driver</title>
<updated>2015-12-22T19:22:39Z</updated>
<author>
<name>Masahiro Yamada</name>
</author>
<published>2015-12-09T06:52:59Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=4b7f48d395a7e3b11ded7695ac2b36d0685e0785'/>
<id>urn:sha1:4b7f48d395a7e3b11ded7695ac2b36d0685e0785</id>
<content type='text'>
The UniPhier System Bus is an external bus that connects on-board
devices to the UniPhier SoC.  Each bank (chip select) is dynamically
mapped to the CPU-viewed address base via the bus controller.  The
bus controller must be configured before any access to the bus.

This driver parses the "ranges" property of the System Bus node and
initialized the bus controller.  After the bus becomes ready, devices
below it are populated.

Note:
Each bank can be mapped anywhere in the supported address space;
there is nothing preventing us from assigning bank 0 on 0x42000000,
0x43000000, or anywhere as long as such region is not used by others.
So, the "ranges" is just one possible software configuration, which
does not seem to fit in device tree because device tree is a hardware
description language.  However, of_translate_address() requires
"ranges" in every bus node between CPUs and device mapped on the CPU
address space.  In other words, "ranges" properties must be statically
defined in device tree.  After some discussion, I decided the dynamic
address reassignment by the driver is too bothersome.  Instead, the
device tree should provide a reasonable translation setup that the OS
can rely on.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>bus: sunxi-rsb: Add Allwinner Reduced Serial Bus (RSB) controller bindings</title>
<updated>2015-10-26T01:11:55Z</updated>
<author>
<name>Chen-Yu Tsai</name>
</author>
<published>2015-10-23T18:41:30Z</published>
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<id>urn:sha1:4a5705a9c270e6e62f735846604d8593a890ca1b</id>
<content type='text'>
Reduced Serial Bus is a proprietary 2-line push-pull serial bus supporting
multiple slave devices. It was developed by Allwinner, Inc. and used by
Allwinner and X-Powers, Inc. for their line of PMICs and other peripheral
ICs.

Recent Allwinner SoCs, starting with the A23, have an RSB controller. This
is used to talk to the PMIC, and later with the A80 and A83 platform, the
audio codec IC.

Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-04-22T16:18:17Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2015-04-22T16:18:17Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=7d2b6ef19cf0f98cef17aa5185de3631a618710a'/>
<id>urn:sha1:7d2b6ef19cf0f98cef17aa5185de3631a618710a</id>
<content type='text'>
Pull ARM SoC driver updates from Olof Johansson:
 "Driver updates for v4.1.  Some of these are for drivers/soc, where we
  find more and more SoC-specific drivers these days.  Some are for
  other driver subsystems where we have received acks from the
  appropriate maintainers.

  The larger parts of this branch are:

   - MediaTek support for their PMIC wrapper interface, a high-level
     interface for talking to the system PMIC over a dedicated I2C
     interface.

   - Qualcomm SCM driver has been moved to drivers/firmware.  It's used
     for CPU up/down and needs to be in a shared location for arm/arm64
     common code.

   - cleanup of ARM-CCI PMU code.

   - another set of cleanusp to the OMAP GPMC code"

* tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (43 commits)
  soc/mediatek: Remove unused variables
  clocksource: atmel-st: select MFD_SYSCON
  soc: mediatek: Add PMIC wrapper for MT8135 and MT8173 SoCs
  arm-cci: Fix CCI PMU event validation
  arm-cci: Split the code for PMU vs driver support
  arm-cci: Get rid of secure transactions for PMU driver
  arm-cci: Abstract the CCI400 PMU specific definitions
  arm-cci: Rearrange code for splitting PMU vs driver code
  drivers: cci: reject groups spanning multiple HW PMUs
  ARM: at91: remove useless include
  clocksource: atmel-st: remove mach/hardware dependency
  clocksource: atmel-st: use syscon/regmap
  ARM: at91: time: move the system timer driver to drivers/clocksource
  ARM: at91: properly initialize timer
  ARM: at91: at91rm9200: remove deprecated arm_pm_restart
  watchdog: at91rm9200: implement restart handler
  watchdog: at91rm9200: use the system timer syscon
  mfd: syscon: Add atmel system timer registers definition
  ARM: at91/dt: declare atmel,at91rm9200-st as a syscon
  soc: qcom: gsbi: Add support for ADM CRCI muxing
  ...
</content>
</entry>
<entry>
<title>Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2015-04-22T16:03:30Z</updated>
<author>
<name>Linus Torvalds</name>
</author>
<published>2015-04-22T16:03:30Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=38eb1dbb0d7d190bdfe2ea824e94dab19e32737f'/>
<id>urn:sha1:38eb1dbb0d7d190bdfe2ea824e94dab19e32737f</id>
<content type='text'>
Pull ARM SoC fixes from Olof Johansson:
 "Here's the usual "low-priority fixes that didn't make it into the last
  few -rcs, with a twist: We had a fixes pull request that I didn't send
  in time to get into 4.0, so we'll send some of them to Greg for
  -stable as well.

  Contents here is as usual not all that controversial:

   - a handful of randconfig fixes from Arnd, in particular for older
     Samsung platforms

   - Exynos fixes, !SMP building, DTS updates for MMC and lid switch

   - Kbuild fix to create output subdirectory for DTB files

   - misc minor fixes for OMAP"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (23 commits)
  ARM: at91/dt: sama5d3 xplained: add phy address for macb1
  kbuild: Create directory for target DTB
  ARM: mvebu: Disable CPU Idle on Armada 38x
  ARM: DRA7: Enable Cortex A15 errata 798181
  ARM: dts: am57xx-beagle-x15: Add thermal map to include fan and tmp102
  ARM: dts: DRA7: Add bandgap and related thermal nodes
  bus: ocp2scp: SYNC2 value should be changed to 0x6
  ARM: dts: am4372: Add "ti,am437x-ocp2scp" as compatible string for OCP2SCP
  ARM: OMAP2+: remove superfluous NULL pointer check
  ARM: EXYNOS: Fix build breakage cpuidle on !SMP
  ARM: dts: fix lid and power pin-functions for exynos5250-spring
  ARM: dts: fix mmc node updates for exynos5250-spring
  ARM: OMAP4: remove dead kconfig option OMAP4_ERRATA_I688
  MAINTAINERS: add OMAP defconfigs under OMAP SUPPORT
  ARM: OMAP1: PM: fix some build warnings on 1510-only Kconfigs
  ARM: cns3xxx: don't export static symbol
  ARM: S3C24XX: avoid a Kconfig warning
  ARM: S3C24XX: fix header file inclusions
  ARM: S3C24XX: fix building without PM_SLEEP
  ARM: S3C24XX: use SAMSUNG_WAKEMASK for s3c2416
  ...
</content>
</entry>
<entry>
<title>ARM: dts: am4372: Add "ti,am437x-ocp2scp" as compatible string for OCP2SCP</title>
<updated>2015-03-26T17:47:48Z</updated>
<author>
<name>Kishon Vijay Abraham I</name>
</author>
<published>2015-03-17T11:24:50Z</published>
<link rel='alternate' type='text/html' href='https://git.0xinfinity.dev/distro/kernel.git/commit/?id=20431db949ce5eec0ff6012688c0ff6d9feb3319'/>
<id>urn:sha1:20431db949ce5eec0ff6012688c0ff6d9feb3319</id>
<content type='text'>
Added a new compatible string "ti,am437x-ocp2scp" for OCP2SCP module.
This is needed since except for the OCP2SCP used in AM437x, SYNC2 value
in OCP2SCP TIMING should be changed whereas the default value is sufficient
in AM437x.

Cc: Tony Lindgren &lt;tony@atomide.com&gt;
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
</entry>
</feed>
